Datasheet Texas Instruments SN74LVTH374 — Даташит
| Производитель | Texas Instruments |
| Серия | SN74LVTH374 |
Восьмеричные триггеры D-типа ABT, 3,3 В, с триггером по фронту и выходами с 3 состояниями
Datasheets
SN54LVTH374, SN74LVTH374 datasheet
PDF, 1.2 Мб, Версия: H, Файл опубликован: 10 окт 2003
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Цены
 Купить SN74LVTH374 на РадиоЛоцман.Цены — от 8.77 до 2 341 ₽42 предложений от 25 поставщиков Микросхема Бистабильный мультивибратор, 3.3V ABT Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs 20-TSSOP -40℃ to 85℃ | |||
| SN74LVTH374PW Texas Instruments | 23 ₽ | ||
| SN74LVTH374PWR Texas Instruments | 29 ₽ | ||
| SN74LVTH374NS Texas Instruments | 37 ₽ | ||
| SN74LVTH374PWRE4 Texas Instruments | по запросу | ||
Статус
| SN74LVTH374DBLE | SN74LVTH374DBR | SN74LVTH374DW | SN74LVTH374DWE4 | SN74LVTH374DWG4 | SN74LVTH374DWR | SN74LVTH374NSR | SN74LVTH374PW | SN74LVTH374PWLE | SN74LVTH374PWR | |
|---|---|---|---|---|---|---|---|---|---|---|
| Статус продукта | Снят с производства | В производстве | В производстве | В производстве | В производстве | В производстве | В производстве | В производстве | Снят с производства | В производстве |
| Доступность образцов у производителя | Нет | Нет | Нет | Нет | Нет | Нет | Нет | Нет | Нет | Нет |
Корпус / Упаковка / Маркировка
| SN74LVTH374DBLE | SN74LVTH374DBR | SN74LVTH374DW | SN74LVTH374DWE4 | SN74LVTH374DWG4 | SN74LVTH374DWR | SN74LVTH374NSR | SN74LVTH374PW | SN74LVTH374PWLE | SN74LVTH374PWR | |
|---|---|---|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 |
| Pin | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 |
| Package Type | DB | DB | DW | DW | DW | DW | NS | PW | PW | PW |
| Industry STD Term | SSOP | SSOP | SOIC | SOIC | SOIC | SOIC | SOP | TSSOP | TSSOP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Width (мм) | 5.3 | 5.3 | 7.5 | 7.5 | 7.5 | 7.5 | 5.3 | 4.4 | 4.4 | 4.4 |
| Length (мм) | 7.2 | 7.2 | 12.8 | 12.8 | 12.8 | 12.8 | 12.6 | 6.5 | 6.5 | 6.5 |
| Thickness (мм) | 1.95 | 1.95 | 2.35 | 2.35 | 2.35 | 2.35 | 1.95 | 1 | 1 | 1 |
| Pitch (мм) | .65 | .65 | 1.27 | 1.27 | 1.27 | 1.27 | 1.27 | .65 | .65 | .65 |
| Max Height (мм) | 2 | 2 | 2.65 | 2.65 | 2.65 | 2.65 | 2 | 1.2 | 1.2 | 1.2 |
| Mechanical Data | Скачать | Скачать | Скачать | Скачать | Скачать | Скачать | Скачать | Скачать | Скачать | Скачать |
| Package QTY | 2000 | 25 | 25 | 25 | 2000 | 2000 | 70 | 2000 | ||
| Carrier | LARGE T&R | TUBE | TUBE | TUBE | LARGE T&R | LARGE T&R | TUBE | LARGE T&R | ||
| Маркировка | LXH374 | LVTH374 | LVTH374 | LVTH374 | LVTH374 | LVTH374 | LXH374 | LXH374 |
Параметры
| Parameters / Models | SN74LVTH374DBLE | SN74LVTH374DBR | SN74LVTH374DW | SN74LVTH374DWE4 | SN74LVTH374DWG4 | SN74LVTH374DWR | SN74LVTH374NSR | SN74LVTH374PW | SN74LVTH374PWLE | SN74LVTH374PWR |
|---|---|---|---|---|---|---|---|---|---|---|
| 3-State Output | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| Approx. Price (US$) | 0.26 | 1ku | 0.26 | 1ku | ||||||||
| Bits | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | ||
| Bits(#) | 8 | 8 | ||||||||
| F @ Nom Voltage(Max), Mhz | 160 | 160 | 160 | 160 | 160 | 160 | 160 | 160 | ||
| F @ Nom Voltage(Max)(Mhz) | 160 | 160 | ||||||||
| ICC @ Nom Voltage(Max), мА | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 | ||
| ICC @ Nom Voltage(Max)(mA) | 5 | 5 | ||||||||
| Тип входа | TTL | TTL | ||||||||
| Рабочий диапазон температур, C | от -40 до 85 | от -40 до 85 | от -40 до 85 | от -40 до 85 | от -40 до 85 | от -40 до 85 | от -40 до 85 | от -40 до 85 | ||
| Operating Temperature Range(C) | -40 to 85 | -40 to 85 | ||||||||
| Output Drive (IOL/IOH)(Max), мА | 64/-32 | 64/-32 | 64/-32 | 64/-32 | 64/-32 | 64/-32 | 64/-32 | 64/-32 | ||
| Output Drive (IOL/IOH)(Max)(mA) | 64/-32 | 64/-32 | ||||||||
| Тип выхода | TTL | TTL | ||||||||
| Package Group | SSOP | SSOP | SOIC | SOIC | SOIC | SOIC | SO | TSSOP | TSSOP | TSSOP |
| Package Size: mm2:W x L, PKG | 20SSOP: 56 mm2: 7.8 x 7.2(SSOP) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SO: 98 mm2: 7.8 x 12.6(SO) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | ||
| Package Size: mm2:W x L (PKG) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) | ||||||||
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| Schmitt Trigger | No | No | No | No | No | No | No | No | No | No |
| Technology Family | LVT | LVT | LVT | LVT | LVT | LVT | LVT | LVT | LVT | LVT |
| VCC(Max), В | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | ||
| VCC(Max)(V) | 3.6 | 3.6 | ||||||||
| VCC(Min), В | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | 2.7 | ||
| VCC(Min)(V) | 2.7 | 2.7 | ||||||||
| Voltage(Nom), В | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | 3.3 | ||
| Voltage(Nom)(V) | 3.3 | 3.3 | ||||||||
| tpd @ Nom Voltage(Max), нс | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 | 4.5 | ||
| tpd @ Nom Voltage(Max)(ns) | 4.5 | 4.5 |
Экологический статус
| SN74LVTH374DBLE | SN74LVTH374DBR | SN74LVTH374DW | SN74LVTH374DWE4 | SN74LVTH374DWG4 | SN74LVTH374DWR | SN74LVTH374NSR | SN74LVTH374PW | SN74LVTH374PWLE | SN74LVTH374PWR | |
|---|---|---|---|---|---|---|---|---|---|---|
| RoHS | Не совместим | Совместим | Совместим | Совместим | Совместим | Совместим | Совместим | Совместим | Не совместим | Совместим |
| Бессвинцовая технология (Pb Free) | Нет | Нет |
Application Notes
- LVT Family Characteristics (Rev. A)PDF, 98 Кб, Версия: A, Файл опубликован: 1 мар 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti - LVT-to-LVTH ConversionPDF, 84 Кб, Файл опубликован: 8 дек 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed. - Bus-Hold CircuitPDF, 418 Кб, Файл опубликован: 5 фев 2001
When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of
Модельный ряд
Серия: SN74LVTH374 (10)
Классификация производителя
- Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Flip-Flop
