Datasheet Texas Instruments SN74LVTH652 — Даташит
| Производитель | Texas Instruments |
| Серия | SN74LVTH652 |
Приемопередатчики и регистры восьмеричной шины ABT 3,3 В с выходами с 3 состояниями
Datasheets
SN54LVTH652, SN74LVTH652 datasheet
PDF, 868 Кб, Версия: F, Файл опубликован: 13 окт 2003
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Цены
 Купить SN74LVTH652 на РадиоЛоцман.Цены — от 28 до 788 ₽32 предложений от 22 поставщиков Микросхема Логический контроллер, 3.3V ABT Octal Bus Transceivers And Registers With 3-State Outputs 24-SSOP -40℃ to 85℃ | |||
| SN74LVTH652PWR Texas Instruments | от 79 ₽ | ||
| SN74LVTH652NSRE4 Texas Instruments | по запросу | ||
| SN74LVTH652PWRE4 Texas Instruments | по запросу | ||
| SN74LVTH652PWG4 Texas Instruments | по запросу | ||
Статус
| SN74LVTH652DBLE | SN74LVTH652DW | SN74LVTH652PW | SN74LVTH652PWLE | SN74LVTH652PWR | |
|---|---|---|---|---|---|
| Статус продукта | Снят с производства | В производстве | В производстве | Снят с производства | В производстве |
| Доступность образцов у производителя | Нет | Нет | Нет | Нет | Нет |
Корпус / Упаковка / Маркировка
| SN74LVTH652DBLE | SN74LVTH652DW | SN74LVTH652PW | SN74LVTH652PWLE | SN74LVTH652PWR | |
|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 |
| Pin | 24 | 24 | 24 | 24 | 24 |
| Package Type | DB | DW | PW | PW | PW |
| Industry STD Term | SSOP | SOIC | TSSOP | TSSOP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Width (мм) | 5.3 | 7.5 | 4.4 | 4.4 | 4.4 |
| Length (мм) | 8.2 | 15.4 | 7.8 | 7.8 | 7.8 |
| Thickness (мм) | 1.95 | 2.35 | 1 | 1 | 1 |
| Pitch (мм) | .65 | 1.27 | .65 | .65 | .65 |
| Max Height (мм) | 2 | 2.65 | 1.2 | 1.2 | 1.2 |
| Mechanical Data | Скачать | Скачать | Скачать | Скачать | Скачать |
| Package QTY | 25 | 60 | 2000 | ||
| Carrier | TUBE | TUBE | LARGE T&R | ||
| Маркировка | LVTH652 | LXH652 | LXH652 |
Параметры
| Parameters / Models | SN74LVTH652DBLE | SN74LVTH652DW | SN74LVTH652PW | SN74LVTH652PWLE | SN74LVTH652PWR |
|---|---|---|---|---|---|
| Approx. Price (US$) | 0.88 | 1ku | 0.88 | 1ku | |||
| Bits | 8 | 8 | 8 | ||
| Bits(#) | 8 | 8 | |||
| F @ Nom Voltage(Max), Mhz | 160 | 160 | 160 | ||
| F @ Nom Voltage(Max)(Mhz) | 160 | 160 | |||
| ICC @ Nom Voltage(Max), мА | 0.005 | 0.005 | 0.005 | ||
| ICC @ Nom Voltage(Max)(mA) | 0.005 | 0.005 | |||
| Тип входа | TTL/CMOS | TTL/CMOS | |||
| Рабочий диапазон температур, C | от -40 до 85 | от -40 до 85 | от -40 до 85 | ||
| Operating Temperature Range(C) | -40 to 85 | -40 to 85 | |||
| Output Drive (IOL/IOH)(Max), мА | -32/64 | -32/64 | -32/64 | ||
| Output Drive (IOL/IOH)(Max)(mA) | -32/64 | -32/64 | |||
| Тип выхода | LVTTL | LVTTL | |||
| Package Group | SOIC TSSOP TVSOP | SOIC | TSSOP | TSSOP | TSSOP |
| Package Size: mm2:W x L, PKG | 24SOIC: 160 mm2: 10.3 x 15.5(SOIC) | 24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP) | 24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP) | ||
| Package Size: mm2:W x L (PKG) | 24TVSOP: 32 mm2: 6.4 x 5(TVSOP) 24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP) 24SOIC: 160 mm2: 10.3 x 15.5(SOIC) | 24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP) | |||
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog |
| Schmitt Trigger | No | No | No | No | No |
| Technology Family | LVT | LVT | LVT | LVT | LVT |
| VCC(Max), В | 3.6 | 3.6 | 3.6 | ||
| VCC(Max)(V) | 3.6 | 3.6 | |||
| VCC(Min), В | 2.7 | 2.7 | 2.7 | ||
| VCC(Min)(V) | 2.7 | 2.7 | |||
| Voltage(Nom), В | 3.3 | 3.3 | 3.3 | ||
| Voltage(Nom)(V) | 3.3 | 3.3 | |||
| tpd @ Nom Voltage(Max), нс | 4.7 | 4.7 | 4.7 | ||
| tpd @ Nom Voltage(Max)(ns) | 4.7 | 4.7 |
Экологический статус
| SN74LVTH652DBLE | SN74LVTH652DW | SN74LVTH652PW | SN74LVTH652PWLE | SN74LVTH652PWR | |
|---|---|---|---|---|---|
| RoHS | Не совместим | Совместим | Совместим | Не совместим | Совместим |
| Бессвинцовая технология (Pb Free) | Нет | Нет |
Application Notes
- LVT Family Characteristics (Rev. A)PDF, 98 Кб, Версия: A, Файл опубликован: 1 мар 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti - LVT-to-LVTH ConversionPDF, 84 Кб, Файл опубликован: 8 дек 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed. - Bus-Hold CircuitPDF, 418 Кб, Файл опубликован: 5 фев 2001
When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of
Модельный ряд
Серия: SN74LVTH652 (5)
Классификация производителя
- Semiconductors> Logic> Buffer/Driver/Transceiver> Registered Transceiver
