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Datasheet Texas Instruments TMS320C6654 — Даташит

ПроизводительTexas Instruments
СерияTMS320C6654
Datasheet Texas Instruments TMS320C6654

Fixed and Floating Point Digital Signal Processor

Datasheets

TMS320C6652 and TMS320C6654 Fixed and Floating-Point Digital Signal Processor datasheet
PDF, 1.7 Мб, Версия: D, Файл опубликован: 22 июн 2016
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Цены

18 предложений от 12 поставщиков
Процессоры и контроллеры цифровых сигналов (DSP, DSC) Fixed/Float Pt DSP
TMS320C6654CZH8
Texas Instruments
2 202 ₽
T-electron
Россия и страны СНГ
TMS320C6654CZH7
Texas Instruments
3 487 ₽
AiPCBA
Весь мир
TMS320C6654CZH7
Texas Instruments
4 083 ₽
ChipWorker
Весь мир
TMS320C6654CZH7
Texas Instruments
4 172 ₽
Сравнительное тестирование аккумуляторов EVE Energy и Samsung типоразмера 18650

Статус

TMS320C6654CZH7TMS320C6654CZH8TMS320C6654CZHA7TMS320C6654CZHA8
Статус продуктаВ производствеВ производствеВ производствеВ производстве
Доступность образцов у производителяНетНетНетНет

Корпус / Упаковка / Маркировка

TMS320C6654CZH7TMS320C6654CZH8TMS320C6654CZHA7TMS320C6654CZHA8
N1234
Pin625625625625
Package TypeCZHCZHCZHCZH
Package QTY60606060
CarrierNOT REQUIREDJEDEC TRAY (5+1)JEDEC TRAY (5+1)JEDEC TRAY (5+1)
МаркировкаTMS320C6654CZH@2012 TIA750MHZTMS320C6654CZH
Width (мм)21212121
Length (мм)21212121
Thickness (мм)2.422.422.422.42
Mechanical DataСкачатьСкачатьСкачатьСкачать

Параметры

Parameters / ModelsTMS320C6654CZH7
TMS320C6654CZH7
TMS320C6654CZH8
TMS320C6654CZH8
TMS320C6654CZHA7
TMS320C6654CZHA7
TMS320C6654CZHA8
TMS320C6654CZHA8
ApplicationsGrid Infrastructure,Machine VisionGrid Infrastructure,Machine VisionGrid Infrastructure,Machine VisionGrid Infrastructure,Machine Vision
DRAMDDR3DDR3DDR3DDR3
DSP1 C66x1 C66x1 C66x1 C66x
DSP MHz, Max.750,850750,850750,850750,850
EMAC10/100/100010/100/100010/100/100010/100/1000
GFLOPS12,13.612,13.612,13.612,13.6
On-Chip L2 Cache1024 KB1024 KB1024 KB1024 KB
Рабочий диапазон температур, Cот -40 до 100,0 до 85от -40 до 100,0 до 85от -40 до 100,0 до 85от -40 до 100,0 до 85
Other On-Chip Memory1024 KB1024 KB1024 KB1024 KB
PCI/PCIe2 PCIe Gen22 PCIe Gen22 PCIe Gen22 PCIe Gen2
Package Size: mm2:W x L, PKGSee datasheet (FCBGA)See datasheet (FCBGA)See datasheet (FCBGA)See datasheet (FCBGA)
RatingCatalogCatalogCatalogCatalog
Serial I/OI2C,SPI,UART,UPPI2C,SPI,UART,UPPI2C,SPI,UART,UPPI2C,SPI,UART,UPP
Total On-Chip Memory, KB1088108810881088

Экологический статус

TMS320C6654CZH7TMS320C6654CZH8TMS320C6654CZHA7TMS320C6654CZHA8
RoHSСовместимСовместимСовместимСовместим

Application Notes

  • TI Keystone DSP PCIe SerDes IBIS-AMI Models
    PDF, 4.8 Мб, Файл опубликован: 9 окт 2014
    This document describes the organization, structure, and proper usage of the TI serializer and deserializer (SerDes) IBIS-AMI models for Keystone DSP PCIe interface.
  • SerDes Implementation Guidelines for KeyStone I Devices
    PDF, 590 Кб, Файл опубликован: 31 окт 2012
    The goal of KeyStone I SerDes collateral material is to make system implementation easier for the customer by providing the system solution. For these SerDes-based interfaces, it is not assumed that the system designer is familiar with the industry specifications, SerDes technology, or RF/microwave PCB design. However, it is still expected that the PCB design work will be supervised by a knowledge
  • TMS320C66x DSP Generation of Devices (Rev. A)
    PDF, 245 Кб, Версия: A, Файл опубликован: 25 апр 2011
  • KeyStone I DDR3 Initialization (Rev. E)
    PDF, 114 Кб, Версия: E, Файл опубликован: 28 окт 2016
    The initialization of the DDR3 DRAM controller on KeyStone I DSPs is straightforward as long as the proper steps are followed. However, if some steps are omitted or if some sequence-sensitive steps are implemented in the wrong order, DDR3 operation will be unpredictable.All DDR3 initialization routines must contain the basic register writes to configure the memory controller within the DSP
  • Hardware Design Guide for KeyStone Devices (Rev. C)
    PDF, 1.7 Мб, Версия: C, Файл опубликован: 15 сен 2013
  • AN-1281 Bumped Die (Flip Chip) Packages (Rev. A)
    PDF, 2.2 Мб, Версия: A, Файл опубликован: 1 май 2004
    Application Note 1281 Bumped Die (Flip Chip) Packages
  • SERDES Link Commissioning on KeyStone I and II Devices
    PDF, 138 Кб, Файл опубликован: 13 апр 2016
    The serializer-deserializer (SerDes) performs serial-to-parallel conversions on data received from a peripheral device and parallel-to-serial conversion on data received from the CPU. This application report explains the SerDes transmit and receive parameters tuning, tools and some debug techniques for TI Keystone I and Keystone II devices.
  • PCIe Use Cases for KeyStone Devices
    PDF, 320 Кб, Файл опубликован: 13 дек 2011
  • The C6000 Embedded Application Binary Interface Migration Guide (Rev. A)
    PDF, 20 Кб, Версия: A, Файл опубликован: 10 ноя 2010
    The C6000 compiler tools support a new ELF-based ABI named EABI. Prior to this time, the compiler only supported a single ABI, which is now named COFF ABI. The following compelling best-in-class features are available under the C6000 EABI:GeneralZero-init globals: “int gvar;” gets set to 0 before main runs.Dynamic linking: Add code to a running system.Native ROM
  • Optimizing Loops on the C66x DSP
    PDF, 585 Кб, Файл опубликован: 9 ноя 2010
  • Clocking Design Guide for KeyStone Devices
    PDF, 1.5 Мб, Файл опубликован: 9 ноя 2010
  • DDR3 Design Requirements for KeyStone Devices (Rev. B)
    PDF, 582 Кб, Версия: B, Файл опубликован: 5 июн 2014
  • TI DSP Benchmarking
    PDF, 62 Кб, Файл опубликован: 13 янв 2016
    This application report provides benchmarks for the C674x DSP core, the C66x DSP core and the ARMВ®CortexВ®-A15 core. This document also shows how to reproduce these benchmarks on specific hardware platforms.
  • Thermal Design Guide for DSP and ARM Application Processors (Rev. A)
    PDF, 324 Кб, Версия: A, Файл опубликован: 17 авг 2016
    This application report has been compiled to provide specific information and considerations regarding thermal design requirements for all DSP and ARM-based single and multi-core processors (collectively referred to as “processors”, “System-on-chip”, or “SoC”). The information contained within this document is intended to provide a minimum level of understanding with regards to the thermal require
  • Plastic Ball Grid Array [PBGA] Application Note (Rev. B)
    PDF, 1.6 Мб, Версия: B, Файл опубликован: 13 авг 2015

Модельный ряд

Классификация производителя

  • Semiconductors> Processors> Digital Signal Processors> C6000 DSP> C66x DSP

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