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Купить LT3010MPMS8E#TR на РадиоЛоцман.Цены — от 203 до 1 510 ₽ 38 предложений от 24 поставщиков Чип стабилизации напряжения, LINEAR TECHNOLOGY LT3010MPMS8E#PBF LDO Voltage Regulator, Adjustable, 3V to 80V in, 300mV drop, 1.275V to 60V/50mA out, MSOP-8...
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Корпус / Упаковка / Маркировка

Параметры

Экологический статус

Другие варианты исполнения

LT3010-5 LT3010-5

Design Notes

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  80V Linear Regulator is Micropower &mdash DN314
  PDF, 75 Кб, Файл опубликован: 2 июн 2003
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  advertisement 80V Linear Regulator Is Micropower
  Design Note 314
  Todd Owen
  Introduction
  Industrial, automotive and telecom applications pose
  tough design challenges due to harsh operating environments and large voltage transients on already high (12V
  to 48V) rails. Some switching power supplies are robust
  enough to provide localized low voltage/high current
  power from high voltage input rails, but switch-mode
  supplies are overly complex for low power keep-alive
  circuits that typically consume only a few milliamps of
  current. For most of these low power circuits, a wide
  input range linear regulator is an ideal solution. supply running from a high voltage rail. The only external components required are input and output bypass
  capacitors, and the input bypass is not required if the
  device is located close enough to the main supply bypass capacitor. Internal frequency compensation on the
  LT3010 stabilizes the output for a wide range of capacitors. A minimum of 1ОјF output capacitance is required
  for stability, and almost any type of output capacitor
  can be used. Small ceramic capacitors with low ESR
  can be used without requiring extra series resistance
  as is sometimes required with other regulators. Introducing the LTВ®3010 High Voltage LDO
  The LT3010 is a high voltage, micropower, low dropout
  linear regulator in a thermally enhanced 8-lead MSOP
  package. It can provide up to 50mA of output current …

Статьи

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  Avoid Debugging Cycles in Power Management for FPGA, GPU and ASIC Systems &mdash LT Journal
  PDF, 3.2 Мб, Файл опубликован: 25 авг 2016
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  Avoid Debugging Cycles in Power Management for FPGA,
  GPU and ASIC Systems
  Afshin Odabaee When it comes to designing FPGA, GPU or ASIC controlled systems, the number of
  design challenges related to power management and analog systems pale in comparison
  to those related to digital design. Nevertheless, it is risky to assume that power system
  design can be left to “later,” or taken in line with digital design. Even seemingly innocuous
  problems in power supply design can significantly delay the release of a system, as any
  added time to the power system debugging cycle can halt all work on the digital side.
  A good way to put DC/DC regulation
  issues to rest is to use a verified development kit offered by the FPGA, GPU or
  ASIC vendor. Often, the design itself or
  a similar design is available as a board/
  kit by the suppliers of power products
  and FPGA, GPU and ASIC manufacturers. Using a tested and verified kit unburdens
  system designers of most power system
  and analog issues, allowing them instead
  to focus their energies on configuring the
  complex digital systems. The optimum
  power system layout is taken care of
  before significant design is undertaken. THOUGHTFUL POWER MANAGEMENT
  IS CHALLENGING AT THE START Every design task is initially daunting,
  and power management design is no
  exception. This is the case when power is …

Модельный ряд

Классификация производителя

• Power Management > LDO Linear Regulators > Positive Linear Regulators (LDO) | Extended Temperature (H & MP) Linear Regulators

Варианты написания:

LT3010MPMS8ETR, LT3010MPMS8E TR