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Datasheet Microchip SY89610L

The SY89610L is a 3

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  SY89610L Data Sheet
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  SY89610L
  77.75MHz to 694MHz Jitter Attenuator and
  Low Phase Noise Frequency Synthesizer General Description
  The SY89610L is a 3.3V, fully differential jitter attenuator
  and frequency synthesizer that accepts a noise clock
  between 19.44MHz and 694MHz, depending on I/O
  frequency selection. The output provides an ultra-low
  jitter clock frequency between 77.75MHz and 694MHz
  covering SONET/SDH, Gigabit Ethernet, Fibre Channel,
  SAS, SATA, and many other communication standards.
  The output jitter of the SY89610L is typically 1psRMS. It
  has a 1kHz to 10kHz programmable loop bandwidth to
  accommodate different jitter attenuation applications
  and PLL requirements. The auto-tune circuit enables
  precision frequency calibration.
  The differential input includes Micrel’s unique, 3-pin
  input termination architecture that interfaces to LVPECL,
  LVDS or CML differential signals, (AC-or DC-coupled)
  as small as 100mV without any level-shifting or
  termination resistor networks in the signal path. For ACcoupled input interface applications, an on-board output
  reference voltage (VREF-AC) is provided to bias the VT pin.
  The outputs are compatible with 400mV typical swing
  into 50Ω loads, with rise/fall times guaranteed to be less ...

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• Clock and Timing > Clock Generation > Clock Synthesizers

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