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Datasheet Microchip SY100ELT24

The SY100ELT24 is a TTL-to-differential ECL translator

Datasheets

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  SY100ELT24 - TTL-to-DIFFERENTIAL ECL TRANSLATOR
  Выписка из документа ↓
  NOT RECOMMENDED FOR NEW DESIGNS
  Micrel, Inc. TTL-to-DIFFERENTIAL
  ECL TRANSLATOR FEATURES
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  в–  SY100ELT24 SY100ELT24 DESCRIPTION 500ps typical propagation delay
  Differential ECL output
  PNP TTL input for minimal loading
  Flow-through pinouts
  Available in 8-pin SOIC package The SY100ELT24 is a TTL-to-differential ECL
  translator. Because ECL levels are used, a +5V, –5.2V
  (or –4.5V) and ground are required. The small outline 8lead SOIC package and the single gate of the ELT24
  makes it ideal for those applications where performance,
  space and low power are at a premium. PIN NAMES
  Pin M9999-031506
  hbwhelp@micrel.com or (408) 955-1690 Function Q, Q Differential ECL Output D TTL Input VCC Positive Supply VEE Negative Supply GND Ground Rev.: C 1 Amendment: /0 Issue Date: March 2005 Micrel, Inc. SY100ELT24 PACKAGE/ORDERING INFORMATION Ordering Information(1)
  VEE 1 D 2
  TTL NC
  NC 8 VCC 7 Q ECL 3 6 4 5 Q
  GND 8-Pin SOIC (Z8-1) Package
  Type Operating ...

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• Clock and Timing > Clock and Data Distribution > Translators

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