Datasheet Microchip PL502-30 — Даташит

PL502-30
750kHz – 800MHz Low Phase Noise VCXO (for 12 to 25MHz Crystals) XIN VDD VDD VDD VDD SEL0^ SEL1^ OUTSEL1^ 65 mil 25 24 23 22 21 20 19 18 26 XOUT 27 SEL3^ 28 SEL2^ 29 OE_CTRL 30 VCON 31 Die ID:
B3535-43 Name Value Size 62 x 65 mil Reverse side GND Pad dimensions 80 micron x 80 micron Thickness 8 mil 5 6 7 8 N/C GND GNDBUF Note: ^ denotes internal pull up 17 GNDBUF 16 LVCMOS 15 LVDSB 14 LVPECLB 13 VDDBUF 12 VDDBUF 11 LVPECL 10 LVDS 9 OE_SEL^ OUTPUT SELECTION AND ENABLE
OUTSEL1
(Pad #18) OUTSEL0
(Pad #25) 0 0 High Drive LVCMOS 0 1 Standard Drive LVCMOS 1 0 LVPECL 1 1 LVDS OE_SELECT
(Pad #9) DIE SPECIFICATIONS 4 GND X 3 GND The PL502-30 is a monolithic low jitter and low
phase noise VCXO IC with LVCMOS, LVDS and
LVPECL output capabilities, covering the 750kHz to
800MHz output range. It allows the control of the
output frequency with an input voltage (VCON),
using a low cost 12MHz to 25MHz crystal.
This one IC can be used to produce a VCXO with
output frequencies ranging from F XIN / 16 to F XIN x 32
thanks to the four frequency selector pads. This
makes the PL502-30 ideal as a universal die for
applications ranging from ADSL to SONET. 2 GND (0,0) Y GND 1 DESCRIPTION (1550,1475) C502 GND п‚ п‚ п‚ п‚ п‚ п‚ п‚ п‚ 750kHz to 800MHz output range
Low phase noise output
п‚ -127dBc/Hz for 155.52MHz @ 10kHz offset
п‚ -115dBc/Hz for 622.08MHz @ 10kHz offset
Selectable LVCMOS, LVPECL or LVDS output
Selectable High Drive or Standard Drive LVCMOS
12MHz to 25MHz crystal input …