Datasheet Texas Instruments TPS51200DRCR — Даташит
| Производитель | Texas Instruments |
| Серия | TPS51200 |
| Модель | TPS51200DRCR |
3A Sink/Source DDR Termination Regulator w/ VTTREF Buffered Reference for DDR2, DDR3, DDR3L and DDR4 10-VSON -40 to 85
Datasheets
TPS51200 Sink and Source DDR Termination Regulator datasheet
PDF, 1.3 Мб, Версия: C, Файл опубликован: 30 ноя 2016
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Цены
 Купить TPS51200DRCR на РадиоЛоцман.Цены — от 7.75 до 93 ₽48 предложений от 21 поставщиков Регуляторы с малым падением напряжения (LDO) Sink/Source DDR Term Reg | |||
| TPS51200DRCR Texas Instruments | от 7.75 ₽ | ||
| TPS51200DRCR Texas Instruments | 12 ₽ | ||
| TPS51200DRCR Texas Instruments | 62 ₽ | ||
| TPS51200DRCR Texas Instruments | от 79 ₽ | ||
Статус
| Статус продукта | В производстве (Рекомендуется для новых разработок) |
| Доступность образцов у производителя | Да |
Корпус / Упаковка / Маркировка
| Pin | 10 |
| Package Type | DRC |
| Industry STD Term | VSON |
| JEDEC Code | S-PDSO-N |
| Package QTY | 3000 |
| Carrier | LARGE T&R |
| Маркировка | 1200 |
| Width (мм) | 3 |
| Length (мм) | 3 |
| Thickness (мм) | .9 |
| Pitch (мм) | .5 |
| Max Height (мм) | 1 |
| Mechanical Data | Скачать |
Параметры
| Control Mode | D-CAP,S3,S4/S5 |
| DDR Memory Type | DDR,DDR2,DDR3,DDR3L,DDR4,LPDDR2,LPDDR3 |
| Iout VTT(Max) | 3 A |
| Iq(Typ) | 0.5 мА |
| Рабочий диапазон температур | от -40 до 85 C |
| Output | VREF,VTT |
| Package Group | VSON |
| Package Size: mm2:W x L | 10VSON: 9 mm2: 3 x 3(VSON) PKG |
| Rating | Catalog |
| Regulator Type | Linear Regulator |
| Special Features | S3/S5 Support |
| Vin Bias(Max) | 3.5 В |
| Vin Bias(Min) | 2.375 В |
| Vin(Max) | 3.5 В |
| Vin(Min) | 1.1 В |
| Vout VTT(Min) | 0.6 В |
Экологический статус
| RoHS | Совместим |
Комплекты разработчика и оценочные наборы
- Evaluation Modules & Boards: TPS51200EVM
TPS51200 Sink Source DDR Termination Regulator
Статус продукта: В производстве (Рекомендуется для новых разработок) - Evaluation Modules & Boards: EVMX777BG-01-00-00
J6Entry, RSP and TDA2E-17 CPU Board Evaluation Module
Статус продукта: В производстве (Рекомендуется для новых разработок) - Evaluation Modules & Boards: EVMX777G-01-20-00
J6Entry/RSP Infotainment (CPU+Display+JAMR3) Evaluation Module
Статус продукта: В производстве (Рекомендуется для новых разработок)
Application Notes
- TMS320C6472 5V Input Pwr Design, Integrated FET DC/DC Converters and ControllersPDF, 452 Кб, Файл опубликован: 26 мар 2010
This reference design is intended for designers who wish to design up to eight TMS320C6472 Digital Signal Processors into a system using a nominal input voltage of 5 V, with a flexible design using external FETs, and low-dropout regulators for the low-power rails. - Power Ref Design for TMS320C6472 5Vin DC/DC Converters (1x C6472)PDF, 251 Кб, Файл опубликован: 31 мар 2010
This reference design is intended for designers who wish to design a TMS320C6472 Digital Signal Processor into a system using a nominal input voltage of 5 V, DC/DC converters with integrated FETs, and allowing for ease-of-design and a smaller solution size. - 'C6472 12Vin Flexible Pwr Design Using DCDC Controllers and LDOs (8x C6472)PDF, 441 Кб, Файл опубликован: 26 мар 2010
This reference design is intended for designers who wish to design up to eight TMS320C6472 Digital Signal Processors into a system using a nominal input voltage of 12 V, external FETs for design flexibility, and low-dropout regulators for the low-power rails. - Power Ref Design for TMS320C6472, 12-Vin Digital Pwr Cntrlrs, and LDOs (Rev. A)PDF, 559 Кб, Версия: A, Файл опубликован: 24 май 2010
This design was created to help those wanting to design a TMS320C6472 digital signal processor into a system using a nominal input of 12 V, having a highly flexible power design, and the ability to monitor temperature as well as dynamically monitoring and controlling voltage and current. - Pwr Ref Design f/'C6472 12-Vin Digital Pwr Controllers and LDOsPDF, 558 Кб, Файл опубликован: 28 апр 2010
This design was created to help designers wishing to design up to eight TMS320C6472 Digital Signal Processors into a system using a nominal input voltage of 12 V, having a highly flexible power design, the ability to monitor temperature, and dynamically monitor and control voltage and current. - Power Reference Design for the 'C6472 12V DCDC Controllers and LDOsPDF, 245 Кб, Файл опубликован: 26 мар 2010
This reference design is intended for designers who wish to design a TMS320C6472 Digital Signal Processor into a system using a nominal input voltage of 12 V external FETs for design flexibility and low-dropout regulators for the low-power rails. - Intel VR11.1 Server Reference DesignPDF, 38 Кб, Файл опубликован: 21 июл 2010
- Power Two Xilinx(TM) LX240 Virtex-6(TM) DevicesPDF, 63 Кб, Файл опубликован: 20 апр 2010
This reference design is intended to help designers wishing to use two of the new Virtex-6™ LX240 FPGA along with DDR memory and other optional circuitry in their designs. It provides nine rails of lower voltage with an input of 12 volts. The use of PTH T2 modules provides a high-performance solution for good transient response and tight regulation while conserving valuable board space. - LDO PSRR Measurement Simplified (Rev. A)PDF, 131 Кб, Версия: A, Файл опубликован: 9 авг 2017
This applicationreportexplainsdifferentmethodsof measuringthe PowerSupplyRejectionRatio(PSRR)of a Low-Dropout(LDO)regulatorand includesthe prosand consof thesemeasuringmethods - LDO Noise Demystified (Rev. A)PDF, 785 Кб, Версия: A, Файл опубликован: 9 авг 2017
Thisapplicationreportexplainsthe differencebetweennoiseand PSRRof an LDO.It also explainsthedifferentwaysnoiseis specifiedin LDOdatasheetsandwhichspecificationshouldbe usedin theapplication.Finallyit explainshow LDOnoiseis reduced.
Модельный ряд
Серия: TPS51200 (4)
- TPS51200DRCR TPS51200DRCRG4 TPS51200DRCT TPS51200DRCTG4
Классификация производителя
- Semiconductors > Power Management > DDR Memory Power Solutions
