Datasheet ATtiny13A. Summary (Microchip) - 2

1. Pin Configurations Figure 1-1.
Pinout of ATtiny13A
8-PDIP/SOIC
(PCINT5/RESET/ADC0/dW) PB5 1 8 VCC (PCINT3/CLKI/ADC3) PB3 2 7 PB2 (SCK/ADC1/T0/PCINT2) (PCINT4/ADC2) PB4 3 6 PB1 (MISO/AIN1/OC0B/INT0/PCINT1) GND 4 5 PB0 (MOSI/AIN0/OC0A/PCINT0)
20-QFN/MLF
DNC DNC DNC DNC DNC 20 19 18 17 16 (PCINT5/RESET/ADC0/dW) PB5 1 15 VCC (PCINT3/CLKI/ADC3) PB3 2 14 PB2 (SCK/ADC1/T0/PCINT2) DNC 3 13 DNC DNC 4 12 PB1 (MISO/AIN1/OC0B/INT0/PCINT1) (PCINT4/ADC2) PB4 5 11 PB0 (MOSI/AIN0/OC0A/PCINT0) 6 7 8 9 10 DNC DNC GND DNC DNC NOTE: Bottom pad should be soldered to ground. DNC: Do Not Connect
10-QFN/MLF
(PCINT5/RESET/ADC0/dW) PB5 1 10 VCC (PCINT3/CLKI/ADC3) PB3 2 9 PB2 (SCK/ADC1/T0/PCINT2) DNC 3 8 DNC (PCINT4/ADC2) PB4 4 7 PB1 (MISO/AIN1/OC0B/INT0/PCINT1) GND 5 6 PB0 (MOSI/AIN0/OC0A/PCINT0) NOTE: Bottom pad should be soldered to ground. DNC: Do Not Connect
2 ATtiny13A
8126FS–AVR–05/12 Document Outline Features 1. Pin Configurations 1.1 Pin Description 1.1.1 VCC 1.1.2 GND 1.1.3 Port B (PB5:PB0) 1.1.4 RESET 2. Overview 2.1 Block Diagram 3. About 3.1 Resources 3.2 Code Examples 3.3 Data Retention 4. Register Summary 5. Instruction Set Summary 6. Ordering Information 7. Packaging Information 7.1 8P3 7.2 8S2 7.3 8S1 7.4 20M1 7.5 10M1 8. Errata 8.1 ATtiny13A Rev. G – H 8.2 ATtiny13A Rev. E – F 8.3 ATtiny13 Rev. A – D 9. Datasheet Revision History 9.1 Rev. 8126F – 05/12 9.2 Rev. 8126E – 07/10 9.3 Rev. 8126D – 11/09 9.4 Rev. 8126C – 09/09 9.5 Rev. 8126B – 11/08 9.6 Rev. 8126A – 05/08