Datasheet AD8571, AD8572, AD8574 (Analog Devices) - 20

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AD8571/AD8572/AD8574 Data Sheet CAPACITIVE LOAD DRIVE
The optimum value for the resistor and capacitor is a function The AD8571/AD8572/AD8574 have excel ent capacitive load of the load capacitance and is best determined empirical y driving capabilities and can safely drive up to 10 nF from a because actual CL includes stray capacitances and can differ single 5 V supply. Although the device is stable, capacitive substantial y from the nominal capacitive load. Table 5 shows loading limits the bandwidth of the amplifier. Capacitive loads some snubber network values that can be used as starting points. also increase the amount of overshoot and ringing at the output. The RC snubber network shown in Figure 59 can be used to
Table 5. Snubber Network Values for Driving Capacitive Loads
reduce the capacitive load ringing and overshoot.
CL (nF) Rx (Ω) Cx
1 200 1 nF
5V AD8571/
4.7 60 0.47 µF
AD8572/ – AD8574
10 20 10 µF
VOUT V Rx IN + 60Ω POWER-UP BEHAVIOR 200mV p-p CL Cx 4.7nF
059
0.47µF
At power-up, the AD8571/AD8572/AD8574 settle to a valid 01104- output within 5 μs. Figure 61 shows an oscil oscope photo of the Figure 59. Snubber Network Configuration for Driving Capacitive Loads output of the amplifier along with the power supply voltage. Although the snubber network does not recover the loss of Figure 62 shows the test circuit. With the amplifier configured amplifier bandwidth from the load capacitance, it does allow for unity gain, the device takes approximately 5 µs to settle to its the amplifier to drive larger values of capacitance while final output voltage, hundreds of microseconds faster than maintaining a minimum of overshoot and ringing. Figure 60 many other autocorrection amplifiers. shows the output of an AD8571/AD8572/AD8574 driving a 1 nF capacitor with and without a snubber network.
10μs VOUT WITH 0V SNUBBER V+ 0V WITHOUT SNUBBER 5µs 1V
061
BOTTOM TRACE = 2V/DIV V
060
TOP TRACE = 1V/DIV S = 5V
01104-
100mV CL = 4.7nF
01104- Figure 61. AD8571/AD8572/AD8574 Output Behavior at Power-Up Figure 60. Overshoot and Ringing Are Substantially Reduced Using a Snubber Network
VSY = 0V TO 5V 100kΩ VOUT 100kΩ AD8571/ AD8572/
062
AD8574
01104- Figure 62. AD8571/AD8572/AD8574 Test Circuit for Power-Up Time Rev. F | Page 20 of 28 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION PIN CONFIGURATIONS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS 5 V ELECTRICAL CHARACTERISTICS 2.7 V ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS FUNCTIONAL DESCRIPTION AMPLIFIER ARCHITECTURE BASIC AUTO-ZERO AMPLIFIER THEORY AUTO-ZERO PHASE AMPLIFICATION PHASE HIGH GAIN, CMRR, AND PSRR MAXIMIZING PERFORMANCE THROUGH PROPER LAYOUT 1/f NOISE CHARACTERISTICS RANDOM AUTO-ZERO CORRECTION ELIMINATES INTERMODULATION DISTORTION BROADBAND AND EXTERNAL RESISTOR NOISE CONSIDERATIONS OUTPUT OVERDRIVE RECOVERY INPUT OVERVOLTAGE PROTECTION OUTPUT PHASE REVERSAL CAPACITIVE LOAD DRIVE POWER-UP BEHAVIOR APPLICATIONS INFORMATION 5 V PRECISION STRAIN GAGE CIRCUIT 3 V INSTRUMENTATION AMPLIFIER HIGH ACCURACY THERMOCOUPLE AMPLIFIER PRECISION CURRENT METER PRECISION VOLTAGE COMPARATOR OUTLINE DIMENSIONS ORDERING GUIDE