Datasheet LTC1096, LTC1096L, LTC1098, LTC1098L (Analog Devices) - 10

LTC1096/LTC1096L LTC1098/LTC1098L
TYPICAL PERFORMANCE CHARACTERISTICS Maximum Clock Frequency vs Maximum Clock Frequency vs Digital Input Logic Threshold Source Resistance Supply Voltage vs Supply Voltage
1 1.5 5 TA = 25°C TA = 25°C TA = 25°C V + INPUT V IN CC = VREF = 5V VREF = 2.5V 1.25 4 0.75 – INPUT R – SOURCE 1.0 3 0.50 0.75 2 0.5 0.25 LOGIC THRESH0LD (V) 1 0.25 MAXIMUM CLOCK FREQUENCY* (MHz) MAXIMUM CLOCK FREQUENCY (MHz) 0 0 0 1 10 100 0 2 4 6 8 10 0 2 4 6 8 10 R – SOURCE (kΩ) SUPPLY VOLTAGE (V) SUPPLY VOLTAGE, VCC (V) 10968 G10 10968 G11 10968 G12
Minimum Wake-Up Time Input Channel Leakage Current Wake-Up Time vs Supply Voltage vs Source Resistance vs Temperature
4 10 1000 TA = 25°C TA = 25°C VREF = 5V VREF = 2.5V VREF = 5V VCC = 5V 100 3 7.5 10 ON CHANNEL 2 5.0 1 R + OFF CHANNEL SOURCE WAKE-UP TIME (μs) V + IN 1 2.5 LEAKAGE CURRENT (nA) MINIMUM WAKE-UP TIME (μs) – 0.1 0 0 0.01 0 2 4 6 8 10 1 10 100 –60 –40 –20 0 20 40 60 80 100 120 140 SUPPLY VOLTAGE, V R CC (V) SOURCE (kΩ) TEMPERATURE (°C) 10968 G13 10968 G14 10968 G15
Minimum Clock Frequency for 0.1LSB Error† vs Temperature ENOBs vs Frequency FFT Plot
200 10 0 VREF = 5V T 180 9 –10 A = 25°C VCC = 5V VCC = VREF = 5V 160 8 –20 fSMPL = 31.25kHz fIN = 5.8kHz 140 7 –30 120 6 –40 100 5 –50 ENOBs 80 4 –60 AMPLITUDE (dB) 60 3 –70 40 2 TA = 25°C –80 MINIMUM CLOCK FREQUENCY (kHz) V 20 CC = VREF = 5V 1 f –90 SMPL = 31.25kHz 0 0 –100 –60 –40 –20 0 20 40 60 80 100 120 140 1 10 100 0 2 4 6 8 10 12 14 16 TEMPERATURE (°C) FREQUENCY (kHz) FREQUENCY (kHz) 10968 G16 10968 G17 10968 G18 * Maximum CLK frequency represents the clock frequency at which a 0.1LSB shift in the error at any code transition from its 0.75MHz value is fi rst detected. † As the CLK frequency is decreased from 500kHz, minimum CLK frequency (Δerror ≤ 0.1LSB) represents the frequency at which a 0.1LSB shift in any code transition from its 500kHz value is fi rst detected. 10968fc 10