LTC1286/LTC1298 WBLOCK DIAGRAM CS/SHDN V CLK CC (VCC/ V REF) (DIN) BIAS AND SERIAL PORT DOUT SHUTDOWN CIRCUIT IN+ (CH0) CSAMPLE – SAR IN– (CH1) + MICROPOWER COMPARATOR CAPACITIVE DAC V GND REF PIN NAMES IN PARENTHESES REFER TO THE LTC1298 TEST CIRCUITSLoad Circuit for tVoltage Waveforms for DdDO, tr and tfOUT Rise and Fall Times, tr, tf 1.4V VOH DOUT 3k VOL DOUT TEST POINT 100pF tr tf LTC1286/98 • TC02 LTC1286/98 • TC01 Voltage Waveforms for DLoad Circuit for tOUT Delay Times, tdDOdis and ten TEST POINT CLK VIL t V dDO 3k CC tdis WAVEFORM 2, ten DOUT VOH tdis WAVEFORM 1 DOUT 100pF VOL LTC1286/98 • TC04 LTC1286/98 • TC03 8
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