Datasheet LTC1744 (Analog Devices) - 2

LTC1744
W W W U U W U ABSOLUTE MAXIMUM RATINGS PACKAGE/ORDER INFORMATION OVDD = VDD (Notes 1, 2)
ORDER PART Supply Voltage (VDD) .. 6V TOP VIEW NUMBER Analog Input Voltage (Note 3) .. – 0.3V to (VDD + 0.3V) SENSE 1 48 OF V 2 47 OGND Digital Input Voltage (Note 4) ... – 0.3V to (V CM DD + 0.3V) GND 3 46 D13 LTC1744CFW + Digital Output Voltage ... – 0.3V to (V A 4 45 IN D12 DD + 0.3V) – LTC1744IFW A 5 44 IN D11 OGND Voltage .. – 0.3V to 1V GND 6 43 OVDD V 7 42 D10 Power Dissipation .. 2000mW DD V 8 41 DD D9 Operating Temperature Range GND 9 40 D8 REFLB 10 39 D7 LTC1744C ... 0°C to 70°C REFHA 11 38 OGND LTC1744I .. – 40°C to 85°C GND 12 37 GND GND 13 36 GND Storage Temperature Range ... – 65°C to 150°C REFLA 14 35 D6 REFHB 15 34 D5 Lead Temperature (Soldering, 10 sec).. 300°C GND 16 33 D4 V 17 32 DD OVDD V 18 31 DD D3 GND 19 30 D2 V 20 29 DD D1 GND 21 28 D0 MSBINV 22 27 OGND ENC 23 26 CLKOUT ENC 24 25 OE FW PACKAGE 48-LEAD PLASTIC TSSOP TJMAX = 150°C, θJA = 35°C/W Consult factory for parts specified with wider operating temperature ranges.
U CO VERTER CHARACTERISTICS The
●
indicates specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Note 5) PARAMETER CONDITIONS MIN TYP MAX UNITS
Resolution (No Missing Codes) ● 14 Bits Integral Linearity Error (Note 6) ● – 4 ±1 4 LSB Differential Linearity Error ● –1 ±0.5 1.5 LSB Offset Error (Note 7) – 20 ±5 20 mV Gain Error External Reference (SENSE = 1.6V) – 3 ±1 3 %FS Full-Scale Tempco IOUT(REF) = 0 ±40 ppm/°C
U U A ALOG I PUT The
●
indicates specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25
°
C. (Note 5) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VIN Analog Input Range (Note 8) 4.75V ≤ VDD ≤ 5.25V ● ±1 to ±1.6 V IIN Analog Input Leakage Current 10 nA CIN Analog Input Capacitance Sample Mode ENC < ENC 15 pF Hold Mode ENC > ENC 8 pF tACQ Sample-and-Hold Acquisition Time ● 7.5 9.5 ns tAP Sample-and-Hold Acquisition Delay Time 0 ns tJITTER Sample-and-Hold Acquisition Delay Time Jitter 0.3 psRMS CMRR Analog Input Common Mode Rejection Ratio 1.0V < (A – + IN = AIN ) < 3.5V 80 dB 1744f 2