LTC1864L/LTC1865L UUWFUNCTIONAL BLOCK DIAGRA VCC CONV (SDI) SCK PIN NAMES IN PARENTHESES REFER TO LTC1865L CONVERT BIAS AND SERIAL SDO CLK SHUTDOWN PORT DATA IN 16 BITS IN+ + (CH0) 16-BIT SAMPLING DATA OUT IN– ADC – (CH1) 1864/65 BD GND VREF TEST CIRCUITSLoad Circuit for tdDO, tr, tf, tdis and tenVoltage Waveforms for SDO Rise and Fall Times, tr, tf TEST POINT VOH SDO VOL 3k VCC tdis WAVEFORM 2, ten SDO tdis WAVEFORM 1 t 20pF r tf 1864 TC04 1864 TC01 Voltage Waveforms for tenVoltage Waveforms for tdis CONV CONV VIH SDO 1864 TC03 SDO 90% ten WAVEFORM 1 (SEE NOTE 1) tdis Voltage Waveforms for SDO Delay Times, tdDO and thDO SDO WAVEFORM 2 10% (SEE NOTE 2) NOTE 1: WAVEFORM 1 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH SCK THAT THE OUTPUT IS HIGH UNLESS DISABLED BY THE OUTPUT CONTROL VIL NOTE 2: WAVEFORM 2 IS FOR AN OUTPUT WITH INTERNAL CONDITIONS SUCH tdDO THAT THE OUTPUT IS LOW UNLESS DISABLED BY THE OUTPUT CONTROL t 1864 TC05 hDO VOH SDO VOL 1864 TC02 sn18645L 18645Lfs 8
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