Datasheet LTC2107 (Analog Devices) - 8

LTC2107
timing Diagrams Double Data Rate LVDS Output Mode Timing All Outputs Are Differential and Have LVDS Levels
tAP ANALOG INPUT N N+1 N+2 N+3 N+4 tH tL ENC– ENC+ tD D0_1+ D0 D1 D0 D1 D0 D1 D0 D1 D0 N-7 N-7 N-6 N-6 N-5 N-5 N-4 N-4 N-3 D0_1– D14_15+ D14 D15 D14 D15 D14 D15 D14 D15 D14 N-7 N-7 N-6 N-6 N-5 N-5 N-4 N-4 N-3 D14_15– OF+ N-7 N-6 N-5 N-4 N-3 OF– tC CLKOUT– 2107 TD02 CLKOUT+
SPI Timing (Write Mode)
tCSS tSCH CS tSCK SCK tSCS tDS A6 A5 A4 A3 A2 A1 A0 D7 D6 D5 D4 D3 D2 D1 D0 SDI R/W tDH HIGH IMPEDANCE SDO
SPI Timing (Read-Back Mode)
CS SCK SDI R/W A6 A5 A4 A3 A2 A1 A0 X X X X X X X X tDO HIGH HIGH IM PEDANCE IM PEDANCE SDO D7 D6 D5 D4 D3 D2 D1 D0 2107 TD03 2107fb 8 For more information www.linear.com/LTC2107 Document Outline Features Applications Description Block Diagram Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy VCM Output Digital Inputs and OUtputs Power Requirements Timing Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Block Diagram Applications Information Package Description Typical Application Related Parts