Datasheet LTC2153-12 (Analog Devices) - 8

LTC2153-12
Typical perForMance characTerisTics LTC2153-12: I LTC2153-12: I VDD vs Sample Rate, OVDD vs Sample Rate, 15MHz Sine Wave Input, –1dBFS 15MHz Sine Wave Input, –1dBFS LTC2153-12: Frequency Response
200 60 –0.5 55 190 –1.0 50 LVDS CURRENT –1.5 180 3.5mA 45 –2.0 170 40 (mA) (mA) –2.5 35 I VDD 160 I OVDD 30 LVDS CURRENT –3.0 1.75mA 150 25 INPUT AMPLITUDE (dBFS) –3.5 140 20 –4.0 130 15 –4.5 0 62 124 186 248 310 0 50 100 150 200 250 300 100 1000 SAMPLE RATE (Msps) SAMPLE RATE (Msps) INPUT FREQUENCY (MHz) 215312 G18 215312 G19 215312 G20
pin FuncTions VDD (Pins 1, 2):
1.8V Analog Power Supply. Bypass to
ENC– (Pin 12):
Encode Complement Input. Conversion ground with 0.1µF ceramic capacitor. Pins 1, 2 can share starts on the falling edge. a bypass capacitor.
NC (Pins 16, 17):
Not Connected.
GND (Pins 3, 6, 10, 13, 35, Exposed Pad Pin 41):
ADC
OV
Power Ground. The exposed pad must be soldered to the
DD (Pins 20, 30):
1.8V Output Driver Supply. Bypass each pin to ground with separate 0.1µF ceramic capacitors. PCB ground.
OGND (Pin 21):
LVDS Driver Ground.
A + IN (Pin 4):
Positive Differential Analog Input.
SDO (Pin 36):
Serial Interface Data Output. In serial
A – IN (Pin 5):
Negative Differential Analog Input. programming mode, (PAR/SER = 0V), SDO is the optional
SENSE (Pin 7):
Reference Programming Pin. Connecting serial interface data output. Data on SDO is read back from SENSE to VDD selects the internal reference and a ±0.66V the mode control registers and can be latched on the falling input range. An external reference between 1.23V and edge of SCK. SDO is an open-drain N-channel MOSFET 1.27V applied to SENSE selects an input range of ±0.528 output that requires an external 2k pull-up resistor from • VSENSE. 1.8V to 3.3V. If readback from the mode control registers
V
is not needed, the pull-up resistor is not necessary and
REF (Pin 8):
Reference Voltage Output. Bypass to ground with a 2.2µF ceramic capacitor. Nominally 1.25V. SDO can be left unconnected.
V SDI (Pin 37):
Serial Interface Data Input. In serial pro-
CM (Pin 9):
Common Mode Bias Output; nominally equal to 0.439 • V gramming mode, (PAR/SER = 0V), SDI is the serial DD. VCM should be used to bias the common mode of the analog inputs. Bypass to ground with a 0.1µF interface data input. Data on SDI is clocked into the mode ceramic capacitor. control registers on the rising edge of SCK. In parallel programming mode (PAR/SER = VDD), SDI selects 3.5mA
ENC+ (Pin 11):
Encode Input. Conversion starts on the or 1.75mA LVDS output current (see Table 2). rising edge. 215312fa 8 For more information www.linear.com/LTC2153-12 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Power Requirements Digital Inputs And Outputs Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagrams Applications Information Typical Applications Package Description Related Parts