LTC2188 TiMing DiagraMsDouble Data Rate CMOS Output Mode TimingAll Outputs Are Single-Ended and Have CMOS Levels tAP CH 1 A A + 2 A + 4 ANALOG INPUT A + 3 tAP A + 1 CH 2 B B + 2 B + 4 ANALOG INPUT B + 3 tH B + 1 tL ENC– ENC+ tD tD BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 D1_0_1 A-6 A-6 A-5 A-5 A-4 A-4 A-3 A-3 A-2 ••• BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 D1_14_15 A-6 A-6 A-5 A-5 A-4 A-4 A-3 A-3 A-2 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 BIT 1 BIT 0 D2_0_1 B-6 B-6 B-5 B-5 B-4 B-4 B-3 B-3 B-2 ••• BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 BIT 15 BIT 14 D2_14_15 B-6 B-6 B-5 B-5 B-4 B-4 B-3 B-3 B-2 OF OF OF OF OF OF OF OF OF OF2_1 B-6 A-6 B-5 A-5 B-4 A-4 B-3 A-3 B-2 tC tC CLKOUT+ CLKOUT– 2188 TD02 2188f 10 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configurations Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs and Outputs Power Requirements Timing Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Functional Block Diagram Applications Information Typical Applications Package Description Typical Application Related Parts
