Datasheet LTC2208-14 (Analog Devices) - 8

LTC2208-14
TIMING DIAGRAM Full-Rate CMOS Output Mode Timing All Outputs are Single-Ended and Have CMOS Levels
tAP N + 1 N + 4 ANALOG INPUT N N + 3 N + 2 tH tL ENC– ENC+ tD DA0-DA13, OFA N – 7 N – 6 N – 5 N – 4 N – 3 tC CLKOUTA CLKOUTB DB0-DB13, OFB HIGH IMPEDANCE 220814 TD02
Demultiplexed CMOS Output Mode Timing All Outputs are Single-Ended and Have CMOS Levels
tAP N + 1 N + 4 ANALOG INPUT N N + 3 N + 2 tH tL ENC– ENC+ tD DA0-DA13, OFA N – 8 N – 6 N – 4 tD DB0-DB13, OFB N – 7 N – 5 N – 3 tC CLKOUTA CLKOUTB 220814 TD03 220814fb 8