Datasheet LTC2217 (Analog Devices) - 8

LTC2217
TIMING DIAGRAMS Full-Rate CMOS Output Mode Timing All Outputs are Single-Ended and Have CMOS Levels
tAP N + 1 N + 4 ANALOG INPUT N N + 3 N + 2 tH tL ENC– ENC+ tD DA0-DA15, OFA N – 7 N – 6 N – 5 N – 4 N – 3 tC CLKOUTA CLKOUTB DB0-DB15, OFB HIGH IMPEDANCE 2217 TD02
Demultiplexed CMOS Output Mode Timing All Outputs are Single-Ended and Have CMOS Levels
tAP N + 1 N + 4 ANALOG INPUT N N + 3 N + 2 tH tL ENC– ENC+ tD DA0-DA15, OFA N – 8 N – 6 N – 4 tD DB0-DB15, OFB N – 7 N – 5 N – 3 tC CLKOUTA CLKOUTB 2217 TD03 2217f 8