Datasheet LTC2228, LTC2227, LTC2226 (Analog Devices) - 5

LTC2228/LTC2227/LTC2226
POWER REQUIREMENTS The
l
denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. (Note 8) LTC2228 LTC2227 LTC2226 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
VDD Analog Supply Voltage (Note 9) l 2.7 3 3.4 2.7 3 3.4 2.7 3 3.4 V OVDD Output Supply Voltage (Note 9) l 0.5 3 3.6 0.5 3 3.6 0.5 3 3.6 V IVDD Supply Current l 68.3 80 40 48 25 30 mA PDISS Power Dissipation l 205 240 120 144 75 90 mW PSHDN Shutdown Power SHDN = H, OE = H, 2 2 2 mW No CLK PNAP Nap Mode Power SHDN = H, OE = L, 15 15 15 mW No CLK
TIMING CHARACTERISTICS The
l
denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. (Note 4) LTC2228 LTC2227 LTC2226 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
fS Sampling Frequency (Note 9) l 1 65 1 40 1 25 MHz tL CLK Low Time Duty Cycle Stabilizer Off l 7.3 7.7 500 11.8 12.5 500 18.9 20 500 ns Duty Cycle Stabilizer On l 5 7.7 500 5 500 5 20 500 ns (Note 7) tH CLK High Time Duty Cycle Stabilizer Off l 7.3 7.7 500 11.8 12.5 500 18.9 20 500 ns Duty Cycle Stabilizer On l 5 7.7 500 5 12.5 500 5 20 500 ns (Note 7) tAP Sample-and-Hold 0 0 0 ns Aperture Delay tD CLK to DATA Delay CL = 5pF (Note 7) l 1.4 2.7 5.4 1.4 2.7 5.4 1.4 2.7 5.4 ns Data Access Time CL = 5pF (Note 7) l 4.3 10 4.3 10 4.3 10 ns After OE↓ BUS Relinquish Time (Note 7) l 3.3 8.5 3.3 8.5 3.3 8.5 ns Pipeline 5 5 5 Cycles Latency
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
Note 5:
Integral nonlinearity is defi ned as the deviation of a code from a may cause permanent damage to the device. Exposure to any Absolute straight line passing through the actual endpoints of the transfer curve. Maximum Rating condition for extended periods may affect device The deviation is measured from the center of the quantization band. reliability and lifetime.
Note 6:
Offset error is the offset voltage measured from –0.5 LSB when
Note 2:
All voltage values are with respect to ground with GND and OGND the output code fl ickers between 0000 0000 0000 and 1111 1111 1111. wired together (unless otherwise noted).
Note 7:
Guaranteed by design, not subject to test.
Note 3:
When these pin voltages are taken below GND or above VDD, they
Note 8:
VDD = 3V, fSAMPLE = 65MHz (LTC2228), 40MHz (LTC2227), or will be clamped by internal diodes. This product can handle input currents 25MHz (LTC2226), input range = 1VP-P with differential drive. of greater than 100mA below GND or above VDD without latchup.
Note 9:
Recommend operating conditions.
Note 4:
VDD = 3V, fSAMPLE = 65MHz (LTC2228), 40MHz (LTC2227), or 25MHz (LTC2226), input range = 2VP-P with differential drive, unless otherwise noted. 222876fb 5