LTC2293/LTC2292/LTC2291 Dual 12-Bit, 65/40/25Msps Low Power 3V ADCs UFEATURESDESCRIPTIO ■ Integrated Dual 12-Bit ADCs The LTC®2293/LTC2292/LTC2291 are 12-bit 65Msps/ ■ Sample Rate: 65Msps/40Msps/25Msps 40Msps/25Msps, low power dual 3V A/D converters de- ■ Single 3V Supply (2.7V to 3.4V) signed for digitizing high frequency, wide dynamic range ■ Low Power: 400mW/235mW/150mW signals. The LTC2293/LTC2292/LTC2291 are perfect for ■ 71.3dB SNR demanding imaging and communications applications ■ 90dB SFDR with AC performance that includes 71.3dB SNR and 90dB ■ 110dB Channel Isolation at 100MHz SFDR for signals at the Nyquist frequency. ■ Multiplexed or Separate Data Bus DC specs include ±0.3LSB INL (typ), ±0.15LSB DNL (typ) ■ Flexible Input: 1VP-P to 2VP-P Range and no missing codes over temperature. The transition ■ 575MHz Full Power Bandwidth S/H noise is a low 0.25LSB ■ Clock Duty Cycle Stabilizer RMS. ■ Shutdown and Nap Modes A single 3V supply allows low power operation. A separate ■ Pin Compatible Family output supply allows the outputs to drive 0.5V to 3.6V 105Msps: LTC2282 (12-Bit), LTC2284 (14-Bit) logic. An optional multiplexer allows both channels to 80Msps: LTC2294 (12-Bit), LTC2299 (14-Bit) share a digital output bus. 65Msps: LTC2293 (12-Bit), LTC2298 (14-Bit) A single-ended CLK input controls converter operation. An 40Msps: LTC2292 (12-Bit), LTC2297 (14-Bit) optional clock duty cycle stabilizer allows high perfor- 25Msps: LTC2291 (12-Bit), LTC2296 (14-Bit) mance at full speed for a wide range of clock duty cycles. 10Msps: LTC2290 (12-Bit), LTC2295 (14-Bit) , LTC and LT are registered trademarks of Linear Technology Corporation. ■ 64-Pin (9mm × 9mm) QFN Package All other trademarks are the property of their respective owners. UAPPLICATIO S ■ Wireless and Wired Broadband Communication ■ Imaging Systems ■ Spectral Analysis ■ Portable Instrumentation UTYPICAL APPLICATIO + OVDD 12-BIT LTC2293: SNR vs Input Frequency, ANALOG INPUT PIPELINED D11A INPUT A S/H OUTPUT • –1dB, 2V Range, 65Msps ADC CORE • – DRIVERS • D0A 72 OGND 71 CLK A CLOCK/DUTY CYCLE CONTROL MUX 70 CLK B CLOCK/DUTY CYCLE SNR (dBFS) CONTROL 69 OVDD D11B + OUTPUT • 12-BIT • 68 ANALOG • INPUT DRIVERS 0 50 100 150 200 PIPELINED INPUT B D0B S/H ADC CORE INPUT FREQUENCY (MHz) – OGND 229321 TA02 229321 TA01 229321fa 1
