LTC2314-14 BLOCK DIAGRAM 2.2µF 2.2µF ANALOG SUPPLY DIGITAL SUPPLY RANGE 2.7V TO 5.25V RANGE 1.71V TO 5.25V 1 5 VDD OVDD 2.5V LDO A ANALOG IN INPUT RANGE 4 + THREE-STATE SDO 0V TO VREF SERIAL S/H 14-BIT SAR ADC 6 OUTPUT – PORT REF SCK 2 7 TIMING 2.2µF GND 1.024V CS 2×/4× LOGIC 3 BANDGAP 8 TS8 PACKAGE 231414 BD ALL CAPACITORS UNLESS NOTED ARE HIGH QUALITY, CERAMIC CHIP TYPE TIMING DIAGRAMS 16TH EDGE t8 t9 SCK CS OVDD/2 OVDD/2 Hi-Z Hi-Z SDO SDO Figure 1. SDO Into Hi-Z after 16TH SCK ↓ Figure 2. SDO Into Hi-Z after CS ↑ 231414 TD01 231414 TD02 t7 t4 SCK SCK OVDD/2 OVDD/2 V V OH OH SDO V SDO OL VOL Figure 3. SDO Data Valid Hold after SCK ↓ Figure 4. SDO Data Valid Access after SCK ↓ 231414 TD03 231414 TD04 231414fa For more information www.linear.com/LTC2314-14 9
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