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Datasheet LTC2325-12 (Analog Devices) - 6

ПроизводительAnalog Devices
ОписаниеQuad, 12-Bit + Sign, 5Msps/Ch Simultaneous Sampling ADC
Страниц / Страница30 / 6 — power requireMenTs. The. denotes the specifications which apply over the …
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Язык документаанглийский

power requireMenTs. The. denotes the specifications which apply over the full operating temperature

power requireMenTs The denotes the specifications which apply over the full operating temperature

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LTC2325-12
power requireMenTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C (Note 4). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
VDD Supply Voltage 5V Operation l 4.75 5.25 V 3.3V Operation l 3.13 3.47 V IVDD Supply Current 5Msps Sample Rate (IN+ = IN– = 0V) l 31 44.5 mA
CMOS I/O Mode: CMOS/LVDS = GND
OVDD Supply Voltage l 1.71 2.63 V IOVDD Supply Current 5Msps Sample Rate (CL = 5pF) l 4.4 15.5 mA INAP Nap Mode Current Conversion Done (IVDD) l 5.3 6.4 mA ISLEEP Sleep Mode Current Sleep Mode (IVDD+ IOVDD) l 20 90 µA PD_3.3V Power Dissipation VDD = 3.3V, 5Msps Sample Rate l 102 181 mW Nap Mode l 18 21.1 mW Sleep Mode l 20 288 µW PD_5V Power Dissipation VDD = 5V, 5Msps Sample Rate l 162 261 mW Nap Mode l 27 32 mW Sleep Mode l 30 424 µW
LVDS I/O Mode: CMOS/LVDS = OVDD, OVDD = 2.5V
OVDD Supply Voltage l 2.37 2.63 V IOVDD Supply Current 5Msps Sample Rate (CL = 5pF, RL = 100Ω) l 26 32 mA INAP Nap Mode Current Conversion Done (IVDD) l 5.3 6.4 mA ISLEEP Sleep Mode Current Sleep Mode (IVDD + IOVDD) l 20 90 µA PD_3.3V Power Dissipation VDD = 3.3V, 5Msps Sample Rate l 151 218 mW Nap Mode l 52 58.6 mW Sleep Mode l 80 288 µW PD_5V Power Dissipation VDD = 5V, 5Msps Sample Rate l 214 303 mW Nap Mode l 50 69.2 mW Sleep Mode l 40 424 µW
aDc TiMing characTerisTics The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C (Note 4). SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
fSMPL Maximum Sampling Frequency l 5 Msps tCYC Time Between Conversions (Note 11) tCYC = tCNVH + tCONV l 0.2 1000 µs tCONV Conversion Time l 170 ns tCNVH CNV High Time l 30 ns tACQUISITION Sampling Aperture (Note 11) tACQUISITION = tCYC – tCONV 28 ns tWAKE REFOUT1,2,3,4 Wake-Up Time CREFOUT1,2,3,4 = 10µF 50 ms
CMOS I/O Mode: SDR, CMOS/LVDS = GND, SDR/ DDR = GND
tSCK SCK Period (Note 13) l 9.1 ns tSCKH SCK High Time l 4.1 ns tSCKL SCK Low Time l 4.1 ns tHSDO_SDR SDO Data Remains Valid Delay from CLKOUT↓ CL = 5pF (Note 12) l 0 1.5 ns tDSCKCLKOUT SCK to CLKOUT Delay (Note 12) l 2.5 4.5 ns 232512f 6 For more information www.linear.com/LTC2325-12 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Typical Application Related Parts
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