LTC2356-12/LTC2356-14 Block Diagram 10µF 3.3V 7 LTC2356-14 VDD A + IN 1 + THREE- TCH STATE S & H 14-BIT ADC SERIAL 8 SDO A – OUTPUT IN 2 – 14-BIT LA PORT 14 VREF 3 10 CONV 10µF 2.5V TIMING REFERENCE LOGIC GND 4 9 SCK 2356 BD 5 6 11 EXPOSED PAD timing DiagramsLTC2356-12 Timing Diagram t2 t7 t3 t1 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 SCK t4 t5 CONV t6 tACQ INTERNAL S/H STATUS SAMPLE HOLD SAMPLE HOLD t8 t8 t9 SDO REPRESENTS THE ANALOG INPUT FROM THE PREVIOUS CONVERSION SDO Hi-Z Hi-Z D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X* X* 2356 TD01 14-BIT DATA WORD tCONV tTHROUGHPUT *BITS MARKED "X" AFTER D0 SHOULD BE IGNORED. 2356fd 10 For more information www.linear.com/LTC2356-12 Document Outline Features Description Applications Block Diagram Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs and Digital Outputs Power Requirements Timing Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagram Applications Information Revision History Typical Application Related Parts
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