Datasheet LTC2404, LTC2408 (Analog Devices) - 31

LTC2404/LTC2408
U U W U APPLICATIONS INFORMATION
* *************************************** * The SPI data transfer * *************************************** * TRFLP1 LDAA #$0 Load accumulator A with a null byte for SPI transfer STAA SPDR This writes the byte into the SPI data register and * starts the transfer WAIT1 LDAA SPSR This loop waits for the SPI to complete a serial * transfer/exchange by reading the SPI Status Register BPL WAIT1 The SPIF (SPI transfer complete flag) bit is the SPSR’s * MSB and is set to one at the end of an SPI transfer. The * branch will occur while SPIF is a zero. LDAA SPDR Load accumulator A with the current byte of LTC2408 data * that was just received STAA 0,X Transfer the LTC2408’s data to memory INX Increment the pointer CPX #DIN4+1 Has the last byte been transferred/exchanged? BNE TRFLP1 If the last byte has not been reached, then proceed to * the next byte for transfer/exchage BSET PORTD,Y %00100000 This sets the SS* output bit to a logic * high, de-selecting the LTC2408 PULA Restore the A register PULY Restore the Y register PULX Restore the X register RTS
Figure 28. LTC2408-68HC11 MCU Digital Interface Routine
5V 7 4 3 2, 8 10µF 9 MUXOUT ADCIN VREF VCC TO 17 CH0 TO 23 CSADC CH7 68HC11 20 CSMUX SS (PD5) 25 24-BIT SCK 19 ∆Σ ADC CLK SCK (PD4) LTC1391 21 DIN MOSI (PD3) 1 15 24 CH8 S0 D SDO MISO (PD2) 2 CH9 S1 VCC 3 CH10 S2 4 26 CH11 S3 LTC2408 GND FO 5 10 CH12 S4 CLK 1, 5, 6, 16, 18, 22, 27, 28 6 11 CH13 S5 CS 7 13 CH14 S6 DOUT 8 12 2404/08 F29 CH15 S7 DIN
Figure 29. Combining the LTC2408 with the LTC1391 for 16 Input Channels
31