LTC2442 TEST CIRCUITS VCC 1.69k SDO SDO 1.69k CLOAD = 20pF CLOAD = 20pF Hi-Z TO VOH Hi-Z TO VOL VOL TO VOH VOH TO VOL V 2442 TA03 OH TO Hi-Z V 2442 TA04 OL TO Hi-Z APPLICATIONS INFORMATION CONVERTER OPERATION POWER UP IN+=CH0, IN–=CH1 Converter Operation Cycle OSR=256,1X MODE The LTC2442 is a multi-channel, high speed, DS ana- CONVERT log-to-digital converter with an easy to use 3- or 4-wire serial interface (see Figure 1). Its operation is made up of three states. The converter operating cycle begins with SLEEP the conversion, followed by the sleep state and ends with the data output/input (see Figure 2). The 4-wire interface consists of serial data input (SDI), serial data output (SDO), CS = LOW serial clock (SCK) and chip select (CS). The interface, AND SCK timing, operation cycle and data out format is compatible with Linear’s entire family of DS converters. CHANNEL SELECT Initially, the LTC2442 performs a conversion. Once the SPEED SELECT DATA OUTPUT conversion is complete, the device enters the sleep state. 2442 F02 The part remains in the sleep state as long as CS is HIGH. The conversion result is held indefinitely in a static shift Figure 2. LTC2442 State Transition Diagram register while the converter is in the sleep state. Once CS is pulled LOW, the device begins outputting the conversion result. There is no latency in the conversion result while operating in the 1X mode. The data output corresponds to the conversion just performed. This re- 2442fb For more information www.linear.com/LTC2442 9
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