LTC2482 TIMING DIAGRAMSTiming Diagram Using Internal SCK CS t1 t2 SDO t tKQMIN 3 tKQMAX SCK SLEEP DATA OUT CONVERSION 2482 TD1 Timing Diagram Using External SCK CS t1 t2 SDO t5 t t KQMIN 6 tKQMAX SCK t4 SLEEP DATA OUT CONVERSION 2482 TD2 APPLICATIONS INFORMATION CONVERTER OPERATION CONVERT Converter Operation Cycle The LTC2482 is a low power, delta-sigma analog-to-digital SLEEP converter with an easy-to-use 3-wire serial interface and automatic differential input current cancellation. Its opera- tion is made up of three states. The converter operating FALSE CS = LOW cycle begins with the conversion, followed by the low power AND sleep state and ends with the data output (see Figure 1). SCK The 3-wire interface consists of serial data output (SDO), TRUE serial clock (SCK) and chip select (CS). DATA OUTPUT Initially, the LTC2482 performs a conversion. Once the 2482 F01 conversion is complete, the device enters the sleep state. While in this sleep state, power consumption is reduced Figure 1. LTC2482 State Transition Diagram 2482fc 10
Купить LTC2482CDD#PBF на РадиоЛоцман.Цены — от 74 до 541 ₽
