LTM9004 TiMing DiagraMsDual Digital Output Bus Timing tAP ANALOG N N + 2 N + 4 INPUT N + 1 N + 3 N + 5 tH tL CLKI = CLKQ tD D0-D13, OF N – 5 N – 4 N – 3 N – 2 N – 1 N tC CLKOUT 9004 TD01 Multiplexed Digital Output Bus Timing tIPI DEMODULATOR I I + 2 I + 4 ANALOG I + 1 I + 3 OUTPUT I tIPQ DEMODULATOR Q Q + 2 Q + 4 ANALOG Q + 1 Q + 3 OUTPUT Q tH tL CLKI = CLKQ = MUX DI0-DI13 I – 5 Q – 5 I – 4 Q – 4 I – 3 Q – 3 I – 2 Q – 2 I – 1 tD tMD DQ0-DQ13 Q – 5 I – 5 Q – 4 I – 4 Q – 3 I – 3 Q – 2 I – 2 Q – 1 tC CLKOUT 9004 TD02 9004fa 8 For more information www.linear.com/LTM9004 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Dynamic Accuracy Converter Characteristics Digital Inputs and Outputs Power Requirements Timing Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Package Description Revision History Typical Application Related Parts
