Datasheet LTC221, LTC222 (Analog Devices) - 5

LTC221/LTC222
U U W U APPLICATIO S I FOR ATIO Switching Time Test Circuit
Switch output waveform shown for VS = constant with state output switch on. Feedthrough via gate capacitance logic input waveform as shown. Note that VS may be (+) may result in spikes at leading and trailing edge of output or (–) as per switching time test circuit. VO is the steady waveform.
Switching Time Test Circuit
LTC222 LOGIC "1" = SW ON SWITCH SWITCH 3V LOGIC INPUT INPUT OUTPUT t 50% S1 D1 r < 20ns V V t OV S = 2V O r < 20ns R C R LTC221 L L L V 3V 1k 35pF O = VS IN1 LOGIC INPUT LOGIC "0" = SW ON RL+ RDS(ON) t 50% LOGIC r < 20ns t OV INPUT r < 20ns SWITCH VS (REPEAT TEST FOR IN2, IN3 AND IN4) INPUT VO 0.9 V 0.9 O SWITCH OV OUTPUT LTC221/222 • AI02 tON tOFF LTC221/222 • AI01
Charge Injection Test Circuit
∆VO RGEN SX DX VO V C GEN L = 1000pF V INX O 3V LTC221 INX OFF ON ON OV LTC221/222 • AI03 ON ON 3V LTC222 INX OFF OV ∆VO IS THE MEASURED VOLTAGE ERROR DUE TO CHARGE INJECTION. THE ERROR VOLTAGE IN COULOMBS IS ∆Q = VL • ∆VO LTC221/222 • AI04
OIRR-Off Isolation Test Circuit CCRR-Channel to Channel Crosstalk Test Circuit
C 15V C 15V SIGNAL SIGNAL GENERATOR V GENERATOR V 50 S V+ VS1 V+ L V Ω D1 V V S = 2VP-P S = 2Vp-p f = 100kHz INX f = 100kHz V IN1 IN2 IN VIN CHAN A CHAN A ANALYZER V V ANALYZER IN D CHAN B VD2 VS2 CHAN B NC GND V– R GND V– L RL 1k 1k C = 0.001µF//0.1µF V C C = 0.001µF//0.1µF CHIP CAPACITORS S V OIRR = 20 LOG C S1 V –15V CHIP CAPACITORS OIRR = 20 LOG D V –15V LTC221/222 • AI05 D2 LTC221/222 • AI06 2212fa 5