Datasheet LT1946A (Linear Technology) - 4

LT1946A
U U U PI FU CTIO S VC (Pin 1):
Error Amplifier Output Pin. Tie external com-
SW (Pin 5):
Switch Pin. This is the collector of the internal pensation network to this pin or use the internal compen- NPN power switch. Minimize the metal trace area con- sation network by shorting the VC pin to the COMP pin. nected to this pin to minimize EMI. External compensation consists of placing a resistor and
V
capacitor in series from V
IN (Pin 6):
Input Supply Pin. Must be locally bypassed. C to GND. Typical capacitor range is from 90pF to 270pF. Typical resistor range is from
COMP (Pin 7):
Internal Compensation Pin. Provides an 25k to 120k. internal compensation network. Tie directly to the VC pin for internal compensation. Tie to GND if not used.
FB (Pin 2):
Feedback Pin. Reference voltage is 1.25V. Connect resistive divider tap here. Minimize trace area at
SS (Pin 8):
Soft-Start Pin. Place a soft-start capacitor FB. Set V here. Upon start-up, 4µA of current charges the capacitor OUT according to VOUT = 1.25 • (1+R1/R2). to 1.5V. Use a larger capacitor for slower start-up. Leave
SHDN (Pin 3):
Shutdown Pin. Tie to 2.4V or more to enable floating if not in use. device. Ground to shut down. Do not float this pin.
GND (Pin 4, Exposed Pad):
Ground.
Tie both Pin 4 and the exposed pad directly to local ground plane.
The ground metal to the exposed pad should be wide for better heat dissipation. Multiple vias (local ground plane ↔ ground backplane) placed close to the exposed pad can further aid in reducing thermal resistance. sn1946a 1946afs 4