LT3464 WBLOCK DIAGRA VIN SW CAP OUT 7 6 5 3 DELAY CPL FB 2 S Q R Q + CTRL 1 – OUT ANTI – SAT + 1.25V OUT 12mV – 0.1Ω SHDN 8 VREF 4 3464 BD GND UOPERATIO The LT3464 uses a constant off-time control scheme in point where the current limit is reached, at which point the conjunction with Burst Mode® operation to provide high switch turns off for a fixed amount of time. While the efficiency over a wide range of output current. Operation switch is off the inductor is delivering current to the load. can best be understood by studying the Block Diagram. When the off time expires, the switch turns on again until When the FB pin voltage is lower than the 1.25V reference, the current limit is reached, and the cycle repeats. the hysteretic comparator enables the power section, This chip includes an internal power Schottky diode and a causing the chip to start switching, thus charging the PNP transistor for output disconnect. The PNP transistor output capacitor. When the output voltage increases disconnects the load from the input during shutdown. The enough to overcome the hysteresis, the feedback com- PNP control circuitry is designed to keep the PNP out of parator shuts off the power section leaving only low power saturation across a wide range of current, to keep quies- circuitry running until the output voltage falls again. This cent current to a minimum and to provide current limiting cycle repeats, keeping the output voltage within a small to protect the chip during short-circuit conditions. window. The switching action is as follows: The switch turns on, and current through it starts to ramp up until the Burst Mode is a registered a trademark of Linear Technolgy Corporation. 3464f 6
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