Datasheet LT3587 (Analog Devices) - 8

LT3587
BLOCK DIAGRAM
V V IN IN EN/SS3 1μA L4 SW3 C5 + SOFT- V + OVERVOLTAGE A8 REF START DS3 PROTECTION 200mV – 0.8V VC3 CAP3 A5 – X3 FLT – C4 A6 R Q Q3 M2 M3 S VOUT3 + VOUT3 RVFB3 VMAX Σ VFB3 56.3k DISCONNECT CONTROL RAMP GENERATOR SHDN3 IFB3 VIN VIN FLT RIFB3 100k EN/SS3 C6 EN/SS1 FLT PTAT BIAS EN/SS3 VIN FILTER R VC1 BANDGAP OSCILLATOR AND S Q VC2 AND LDO 16ms L1 VC3 DELAY VOUT1 SW1 RFB1 – DS1 EN/SS1 CAP1 VC1 FB1 A1 – X1 88.5k C1 + M1 A3 R Q Q1 S FLT + VOUT1 DISCONNECT Σ CONTROL 200mV – V A7 REF + 1.22V RAMP SHDN1 V GENERATOR 1μA IN EN/SS1 SOFT- C3 START SEQUENCING VIN 153k FB2 – L2 SW2 VC2 A2 – X2 RFB2 + A4 R Q Q2 S VNEG + C2 GND Σ DS2 RAMP GENERATOR L3 VNEG C7 3587 F01
Figure 1. Block Diagram
3587fc 8