Datasheet LT8415 (Analog Devices) - 7

LT8415
TIMING DIAGRAM
2V IN1,IN2 VOLTAGE 0V RISE FALL TIME DELAY 34V 30V OUT1,OUT2 VOLTAGE 4V 0V RISE FALL DELAY TIME 8415 TD
OPERATION Switching Regulator
the circuit, special precautions are taken to ensure that The LT8415 utilizes a variable peak current, variable off- the inductor current remains under control. time control scheme to provide high efficiency over a wide The LT8415 also has a PMOS output disconnect switch. output current range. The PMOS switch is turned on when the part is enabled The operation of the part can be better understood by via the SHDN pin. When the part is in shutdown, the referring to the Block Diagram. The part senses the output PMOS switch turns off, allowing the VOUT node to go to voltage by monitoring the internal FB node, and servoing ground. This type of disconnect function is often required the FB node voltage to be equal to the FBP pin voltage. in power supplies. The chip integrates an accurate high value resistor divider
Half-Bridge
(12.4MEG/0.4MEG) from the VOUT pin. The output voltage is set by the FBP pin voltage, which in turn is set by an The N-channel and P-channel MOSFETs in each half-bridge external resistor divider from the VREF pin. The FBP pin are synchronously controlled by a single input pin, and voltage can also be directly biased with an external refer- will never turn on at the same time in typical applications, ence, allowing full control of the output voltage during protecting against shoot-through current. The OUT1 and operation. OUT2 pins are the same polarity as the IN1 and IN2 pins respectively. When the part is disabled, both N-channel The Switch Control block senses the output of the ampli- and P-channel MOSFETs turn off, and the OUT1 and OUT2 fier and adjusts the switching frequency as well as other pins will become high impedance with a 20MΩ pull down parameters to achieve regulation. During the start-up of resistor connected to ground. 8415fb For more information www.linear.com/LT8415 7