Datasheet LT8495 (Analog Devices) - 10

LT8495
BLOCK DIAGRAM
2.1V – SWEN OVP + 1.00V SS 256k Q S SR2 R DIE + + VIN + TEMP CHIP 34V – – 2.4V SHUTDOWN – 165°C – SUPPLY 100mV SELECT + LOGIC 2.1V – BIAS DISABLE PSD VOLTAGE 1.10V 34V + REFS 1.00V I + LIMIT SOFT- OTHERS – 2.4V START VC_LIMITER – Burst LOW POWER MODE VC A1 Mode + 1.202V DETECT SW – POWER +A3 R Q SWITCH Q1 FB FREQUENCY SR1 DRIVER FOLDBACK QUADRATIC S RAMP GENERATOR + A2 RT ADJUSTABLE – GND OSCILLATOR RST RSTIN – PGOOD RESET + 1.10V ADJUSTABLE WDO RESET PULSE CHIP GENERATOR SHUTDOWN WATCHDOG TIMEOUT WDE + 1.00V – ENABLE 2.3µA 2.3µA WATCHDOG CPOR WDI TRANSITION TIMER DETECT 23µA 23µA CWDT 8495 BD 8495fb 10 For more information www.linear.com/LT8495 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagrams Operation Applications Information Typical Applications Package Description Revision History Typical Applications Related Parts