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Datasheet LT8582 (Analog Devices) - 3

ПроизводительAnalog Devices
ОписаниеDual 3A Boost/Inverting/SEPIC DC/DC Converter with Fault Protection
Страниц / Страница36 / 3 — ELECTRICAL CHARACTERISTICS. The. denotes the specifications which apply …
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Язык документаанглийский

ELECTRICAL CHARACTERISTICS. The. denotes the specifications which apply over the full operating

ELECTRICAL CHARACTERISTICS The denotes the specifications which apply over the full operating

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LINEAR TECHNOLOGY LT8582IDKD#PBF DC-DC Switching Regulator, Inverting, 2 Output, 2.5V to 22V in, 42V/1.7A out, 2.875MHz, DFN-24
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LT8582
ELECTRICAL CHARACTERISTICS The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 5V, VSHDN = VIN, unless otherwise noted (Note 2). Specifications are identical for both channels unless noted otherwise. PARAMETER CONDITIONS MIN TYP MAX UNITS
Minimum Input Voltage VIN l 2.3 2.5 V VIN Overvoltage Lockout 22.2 24.5 27 V Positive Feedback Voltage l 1.185 1.204 1.220 V Negative Feedback Voltage l 2 7 16 mV Positive FBX Pin Bias Current VFBX = Positive Feedback Voltage, Current into Pin l 81 83.3 85 μA Negative FBX Pin Bias Current VFBX = Negative Feedback Voltage, Current out of Pin l 81 83.3 85.5 μA Error Amp Transconductance ΔI = 10μA 280 μmhos Error Amp Voltage Gain 80 V/V Quiescent Current VSHDN = 2.5V, Not Switching 2.1 2.5 mA Quiescent Current in Shutdown VSHDN = 0 0 1 μA Reference Line Regulation 2.5V ≤ VIN ≤ 20V 0.01 0.05 %/V Switching Frequency, fOSC RT = 31.6kΩ l 2.125 2.5 2.875 MHz RT = 407kΩ l 170 200 230 kHz Switching Frequency in Foldback Compared to Normal fOSC 1/6 ratio Switching Frequency Range Free-Running or Synchronizing l 200 2500 kHz SYNC High Level for Sync l 1.3 V SYNC Low Level for Sync l 0.4 V SYNC Clock Pulse Duty Cycle VSYNC = 0V to 2V 20 80 % Recommended Min SYNC Ratio fSYNC/fOSC 3/4 ratio Minimum Off-Time 45 ns Minimum On-Time 55 ns SWA Current Limit Minimum Duty Cycle l 1.8 2.4 3 A Maximum Duty Cycle l 1.3 1.8 2.5 A SWA FAULT Current Limit Minimum Duty Cycle l 2.2 2.8 3.5 A Maximum Duty Cycle l 1.6 2.3 3.0 A SW Current Sharing, ISWB/ISWA SWA and SWB Tied Together 0.79 A/A SWA + SWB Current Limit Minimum Duty Cycle, ISWB/ISWA = 0.79 l 3.3 4.3 5.4 A Maximum Duty Cycle, ISWB/ISWA = 0.79 l 2.3 4.1 4.5 A SWA + SWB FAULT Current Limit Minimum Duty Cycle, ISWB/ISWA = 0.79 l 4 5 6.3 A Maximum Duty Cycle, ISWB/ISWA = 0.79 l 2.8 4 5.4 A Switch VCESAT ISWA + ISWB = 2.75A 270 mV SWA Leakage Current VSWA = 5V, VSHDN = 0 0.01 1 μA SWB Leakage Current VSWB = 5V, VSHDN = 0 0.01 1 μA SS Charge Current VSS = 30mV, Current Flows out of SS Pin l 5.7 8.8 11.7 μA SS Discharge Current Part in FAULT, VSS = 2.1V, Current Flows into SS Pin l 5.7 8.8 11.7 μA SS High Detection Voltage Part in FAULT l 1.65 1.84 2 V SS Low Detection Voltage Part Exiting FAULT l 15 55 100 mV SHDN Minimum Input Voltage High Active Mode, SHDN Rising l 1.26 1.31 1.4 V Active Mode, SHDN Falling l 1.21 1.27 1.35 V SHDN Input Voltage Low Shutdown Mode l 0.3 V 8582f 3 Document Outline FEATURES DESCRIPTION APPLICATIONS TYPICAL APPLICATION ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDER INFORMATION ELECTRICAL CHARACTERISTICS TYPICAL PERFORMANCE CHARACTERISTICS PIN FUNCTIONS BLOCK DIAGRAM STATE DIAGRAM OPERATION APPLICATIONS INFORMATION APPENDIX TYPICAL APPLICATIONS PACKAGE DESCRIPTION TYPICAL APPLICATION RELATED PARTS
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