Datasheet LTC3122 (Analog Devices) - 8

LTC3122
block DiagraM
BULK CONTROL SW SIGNALS 1 VIN ANTI-RING L1 VOUT 11 VOUT 2.2V TO 15V V V IN IN 3 1.8V TO 5.5V COUT C TSD IN PWM VREF_UP LOGIC OSC AND C1 DRIVERS 100nF SD 16.2V OVLO + – SD CURRENT 9 SHUTDOWN SD SENSE + – IZERO PGND COMP OVLO CAP R 12 PL PWM PWM/SYNC BURST 4 CPL SYNC R1 CONTROL – + – FB VC – 8 + 1.202V R2 VIN VOUT gm ERROR ILIM AMPLIFIER REF VBEST VC ADAPTIVE SLOPE COMPENSATION 7 VCC 5 LDO C R F C SD C SOFT-START VCC TSD 4.7µF VC CLAMP C OVLO C REFERENCE VREF_UP OSCILLATOR OSC UVLO 1.202V RT 6 SGND 10 THERMAL SD TSD RT PGND 2 EXPOSED PAD 13 LTC3122 3122 BD THE VALUES OF RC, CC, AND CF ARE BASED UPON OPERATING CONDITIONS. PLEASE REFER TO COMPENSATING THE FEEDBACK LOOP SECTION FOR GUIDELINES TO DETERMINE OPTIMAL VALUES OF THESE COMPONENTS. 3122fa 8 For more information www.linear.com/LTC3122 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts