Datasheet LTC3525-3, LTC3525-3.3, LTC3525-5 (Analog Devices) - 8

LTC3525-3/ LTC3525-3.3/LTC3525-5
pin FuncTions SHDN (Pin 1):
Logic-Controlled Shutdown Input. Con-
VOUT (Pin 4):
Output Voltage Sense and the Output of the nect to a voltage >1V to enable the LTC3525. Connect to Synchronous Rectifier. Connect the output filter capacitor a voltage <0.4V to disable the LTC3525. from VOUT to GND, close to the IC. A minimum value of
GND (Pins 2, 5):
Ground. 10µF ceramic is recommended. Use 22µF for reduced output ripple. The output disconnect feature disconnects
VIN (Pin 3):
Input Voltage. The LTC3525 is powered from VOUT from VIN when SHDN is <0.4V. VIN until VOUT exceeds VIN. Once VOUT is greater than (VIN + 0.2V typical), it is powered from V
SW (Pin 6):
Switch Pin. Connect an inductor from this OUT. Place a ceramic bypass capacitor from V pin to VIN. An internal antiringing resistor is connected IN to GND. A minimum value of 1µF is recommended. across SW and VIN after the inductor current has dropped to zero to minimize EMI. 3525fc 8 For more information www.linear.com/LTC3525 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Typical Applications Package Description Revision History Typical Application Related Parts