Datasheet LTC3828 (Analog Devices) - 9

LTC3828
BLOCK DIAGRAM
PHSMD PHASE LOGIC CLKOUT PHASE DET PLLFLTR CLK1 RLP OSCILLATOR CLK2 CLP – 0.86V + PGOOD VOSENSE1 – 0.8V VREF VIN + 0.74V – 0.86V DRVCC 5V LDO REG + VOSENSE2 INTVCC 3V – 5V + 0.74V + 0.18μA 4.5V – INTERNAL BINH SUPPLY SGND (UH PACKAGE PAD) + FCB/PLLIN PLL + DETECTOR FCB – DRVCC VIN DUPLICATE FOR SECOND BOOST DB CONTROLLER CHANNEL TG CB DROP TOP + OUT CIN D1 DET BOT FCB SW TOP ON DRV S Q CC SWITCH R Q LOGIC BG BOT B 0.55V + C PGND + OUT – V SHDN OUT INTVCC RSENSE I1 + – – + + – SENSE+ – + 30k I2 3mV 0.86V SENSE– 4 s V 30k FB SLOPE COMP 45k 45k 1.2μA V R2 OSENSE 2.4V VFB – EA + 0.80V OV TRCKSS R1 + – 0.86V C C I C SS TH SHDN RUN C R RST 100k SOFT- C2 C 4(VFB) START RUN 3828 FD/F01
Figure 1
3828fc 9