Datasheet LTC3832, LTC3832-1 (Analog Devices) - 8

LTC3832/LTC3832-1
W BLOCK DIAGRA (LTC3832-1)
DISABLE GATE DRIVE THERMAL SHUTDOWN INTERNAL OSCILLATOR POWER DOWN PVCC1 – S Q G1 PWM R Q VCC/PVCC2 + COMP G2 FFG2 12µA S Q ENABLE PGND SS QSS G2 MAX POR R ERR – + + – FB VREF 2.2V VREF + 10% QC 1.2V + PVCC1 V VREF – V BG CC + 2.5V VREF + 10% 3832 BD2
TEST CIRCUITS
5V PVCC VSHDN VCC + 10µF 0.1µF SHDN VCC PVCC2 PVCC1 IFB IFB VCC PVCC1 PVCC2 NC FB G1 V COMP COMP G1 G1 RISE/FALL NC SS 6800pF 6800pF NC FREQSET LTC3832 LTC3832 NC COMP IMAX G2 V FB FB G2 G2 RISE/FALL 6800pF GND PGND SENSE– SENSE+ IMAX GND PGND 6800pF 3832 F03 3832 F02
Figure 2 Figure 3 U U W U APPLICATIO S I FOR ATIO OVERVIEW
feedback and control circuitry to form a complete switch- The LTC3832/LTC3832-1 are voltage mode feedback, ing regulator circuit. The PWM loop nominally runs at synchronous switching regulator controllers (see Block 300kHz. Diagram) designed for use in high power, low voltage The LTC3832 includes a current limit sensing circuit that step-down (buck) converters. They include an onboard uses the topside external N-channel power MOSFET as a PWM generator, a precision reference trimmed to ±0.8%, current sensing element, eliminating the need for an two high power MOSFET gate drivers and all necessary external sense resistor. sn3832 3832fs 8