Datasheet AD7961 (Analog Devices) - 5
Производитель | Analog Devices |
Описание | 16-Bit, 5 MSPS PULSAR® Differential ADC |
Страниц / Страница | 25 / 5 — AD7961. Data Sheet. Parameter Test. Conditions/Comments. Min. Typ. Max. … |
Версия | B |
Формат / Размер файла | PDF / 629 Кб |
Язык документа | английский |
AD7961. Data Sheet. Parameter Test. Conditions/Comments. Min. Typ. Max. Unit

22 предложений от 12 поставщиков Микросхема Преобразователь AD, ANALOG DEVICES AD7961BCPZ-RL7 Analog to Digital Converter, 16Bit, 5MSPS, Single, 1.71V, 5.25V, LFCSP |
| AD7961BCPZ-RL7 Analog Devices | 1 745 ₽ | |
| AD7961BCPZ-RL7 Analog Devices | 3 570 ₽ | |
| AD7961BCPZ-RL7 Analog Devices | 3 756 ₽ | |
| AD7961BCPZ-RL7 Analog Devices | от 5 495 ₽ | |
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AD7961 Data Sheet Parameter Test Conditions/Comments Min Typ Max Unit
EXTERNAL REFERENCE Voltage Range REFIN pin, EN1 to EN0 = 01 2.048 V REF pin, EN1 to EN0 = 106 4.096 V REF pin, EN1 to EN0 = 016 5 V Current Drain 5 MSPS, REF = 4.096 V 1.05 1.11 mA 5 MSPS, REF = 5 V 1.36 1.43 mA VCM PIN VCM Output REF/2 VCM Error −0.01 +0.01 V Output Impedance 5.1 kΩ LVDS I/O (ANSI-644) Data Format Serial LVDS twos complement Differential Output Voltage, VOD RL = 100 Ω 245 290 454 mV Common-Mode Output Voltage, VOCM RL = 100 Ω 9807 1130 1375 mV Differential Input Voltage, VID 100 650 mV Common-Mode Input Voltage, VICM 800 1575 mV POWER SUPPLIES Specified Performance VDD1 4.75 5 5.25 V VDD2 1.71 1.8 1.89 V VIO 1.71 1.8 1.89 V Operating Currents8 Static—Not Converting, Internal Self clocked mode, CNV± in CMOS Reference Buffer Disabled mode9 VDD1 8 40 μA VDD2 8 70 μA VIO 5 5.3 mA Static—Not Converting, Internal Self clocked mode, CNV± in CMOS Reference Buffer Enabled mode9 VDD1 2.6 2.9 mA VDD2 9 72 μA VIO 4.4 5.3 mA Converting: Internal Reference Buffer Echoed clock mode, CNV± in LVDS Disabled mode VDD1 2 2.2 mA VDD2 11.4 13.5 mA VIO 9 10.3 mA Converting: Internal Reference Buffer Echoed clock mode, CNV± in LVDS Enabled mode VDD1 5.6 6 mA VDD2 11.4 13.5 mA VIO 9 10.3 mA Converting: Internal Reference Buffer Self clocked mode, CNV± in CMOS Disabled mode9 VDD1 2 2.2 mA VDD2 11.4 13.5 mA VIO 4.9 5.6 mA Snooze Mode VDD1 2 4.1 μA VDD2 1 40.3 μA VIO 0.1 4.8 μA Rev. B | Page 4 of 24 Document Outline Features Applications Functional Block Diagram General Description Table of Contents Revision History Specifications Timing Specifications Timing Diagrams Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Terminology Theory of Operation Circuit Information Converter Information Transfer Function Analog Inputs Typical Applications Voltage Reference Options Wake-Up Time from Power-Down and Snooze Modes Power Supply Power-Up Digital Interface Conversion Control Echoed Clock Interface Mode Self Clocked Mode Applications Information Layout Evaluating AD7961 Performance Outline Dimensions Ordering Guide