Datasheet AD9634 (Analog Devices) - 3

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AD9634 Data Sheet TABLE OF CONTENTS
Features .. 1 ADC Architecture .. 19 Applications ... 1 Analog Input Considerations ... 19 Functional Block Diagram .. 1 Voltage Reference ... 21 General Description ... 1 Clock Input Considerations .. 21 Product Highlights ... 1 Power Dissipation and Standby Mode .. 23 Revision History ... 2 Digital Outputs ... 23 Specifications ... 3 ADC Overrange (OR) .. 23 ADC DC Specifications ... 3 Serial Port Interface (SPI) .. 24 ADC AC Specifications ... 4 Configuration Using the SPI ... 24 Digital Specifications ... 6 Hardware Interface ... 24 Switching Specifications .. 7 SPI Accessible Features .. 25 Timing Specifications .. 8 Memory Map .. 26 Absolute Maximum Ratings .. 9 Reading the Memory Map Register Table ... 26 Thermal Characteristics .. 9 Memory Map Register Table ... 27 ESD Caution .. 9 Applications Information .. 29 Pin Configuration and Function Descriptions ... 10 Design Guidelines .. 29 Typical Performance Characteristics ... 12 Outline Dimensions ... 30 Equivalent Circuits ... 18 Ordering Guide .. 30 Theory of Operation .. 19
REVISION HISTORY 12/14—Rev. A to Rev. B
Changes to Features Section.. 1 Changes to Reading the Memory Map Register Table Section .. 26 Changes to Table 13 .. 28
7/14—Rev. 0 to Rev. A
Changes to Features Section.. 1 Changes to Ful Power Bandwidth Parameter, Table 2 .. 5 Deleted Noise Bandwidth Parameter, Table 2... 5
7/11—Revision 0: Initial Version
Rev. B | Page 2 of 30 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ADC DC SPECIFICATIONS ADC AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS Timing Diagram TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS THEORY OF OPERATION ADC ARCHITECTURE ANALOG INPUT CONSIDERATIONS Input Common Mode Differential Input Configurations VOLTAGE REFERENCE CLOCK INPUT CONSIDERATIONS Clock Input Options Input Clock Divider Clock Duty Cycle Jitter Considerations POWER DISSIPATION AND STANDBY MODE DIGITAL OUTPUTS Digital Output Enable Function (OEB) Timing Data Clock Output (DCO) ADC OVERRANGE (OR) SERIAL PORT INTERFACE (SPI) CONFIGURATION USING THE SPI HARDWARE INTERFACE SPI ACCESSIBLE FEATURES MEMORY MAP READING THE MEMORY MAP REGISTER TABLE Open Locations Default Values Logic Levels Transfer Register Map MEMORY MAP REGISTER TABLE APPLICATIONS INFORMATION DESIGN GUIDELINES Power and Ground Recommendations Exposed Paddle Thermal Heat Slug Recommendations VCM SPI Port OUTLINE DIMENSIONS ORDERING GUIDE