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Datasheet AD7986 (Analog Devices) - 8

ПроизводительAnalog Devices
Описание18-Bit, 2 MSPS PulSAR 15 mW ADC in QFN
Страниц / Страница29 / 8 — Data Sheet. AD7986. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. FIN. E …
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Язык документаанглийский

Data Sheet. AD7986. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. FIN. E R. REF 1. 15 TURBO. REF 2. 14 SDI. REFGND 3. TOP VIEW. 13 CNV. REFGND 4

Data Sheet AD7986 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS FIN E R REF 1 15 TURBO REF 2 14 SDI REFGND 3 TOP VIEW 13 CNV REFGND 4

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Data Sheet AD7986 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS FIN DD ND ND DD E R BV AG AG AV 20 19 18 17 16 REF 1 15 TURBO REF 2 14 SDI AD7986 REFGND 3 TOP VIEW 13 CNV REFGND 4 (Not to Scale) 12 SCK IN– 5 11 DVDD 6 7 8 9 10 F O N+I VI DO ND S DRE P DG NOTES 1. THE EXPOSED PAD IS NOT CONNECTED INTERNALLY. FOR INCREASED RELIABILITY OF THE SOLDER JOINTS,
004
IT IS RECOMMENDED THAT THE PAD BE SOLDERED TO THE SYSTEM GROUND PLANE.
07956- Figure 4. Pin Configuration
Table 6. Pin Function Descriptions Pin No. Mnemonic Type1 Description
1, 2 REF AI Reference Output/Input Voltage. When PDREF = low, the internal reference and buffer are enabled, producing 4.096 V on this pin. When PDREF = high, the internal reference and buffer are disabled, allowing an externally supplied voltage reference up to 5.0 V. Decoupling is required with or without the internal reference and buffer. This pin is referred to the REFGND pins and must be decoupled closely to the REFGND pins with a 10 µF capacitor. 3, 4 REFGND AI Reference Input Analog Ground. 5 IN− AI Differential Negative Analog Input. 6 IN+ AI Differential Positive Analog Input. 7 PDREF DI Internal Reference Power-Down Input. When low, the internal reference is enabled. When high, the internal reference is powered down and an external reference must be used. 8 VIO P Input/Output Interface Digital Power. Nominally at the same supply as the host interface (1.8 V, 2.5 V, or 2.7 V). 9 SDO DO Serial Data Output. The conversion result is output on this pin. It is synchronized to SCK. 10 DGND P Digital Power Ground. 11 DVDD P Digital Power. Nominally at 2.5 V. 12 SCK DI Serial Data Clock Input. When the device is selected, the conversion result is shifted out by this clock. 13 CNV DI Convert Input. This input has multiple functions. On the leading edge, it initiates the conversions and selects the interface mode of the device: chain mode or CS mode. In CS mode, the SDO pin is enabled when CNV is low. In chain mode, the data must be read when CNV is high. 14 SDI DI Serial Data Input. This input provides multiple features. It selects the interface mode of the ADC as follows: Chain mode is selected if SDI is low during the CNV rising edge. In this mode, SDI is used as a data input to daisy-chain the conversion results of two or more ADCs onto a single SDO line. The digital data level on SDI is output on SDO with a delay of 18 SCK cycles. CS mode is selected if SDI is high during the CNV rising edge. In this mode, either SDI or CNV can enable the serial output signals when low. If SDI or CNV is low when the conversion is complete, the busy indicator feature is enabled. 15 TURBO DI Conversion Mode Selection. When TURBO = high, the maximum throughput (2 MSPS) is achieved. The ADC does not power down between conversions. When TURBO = low, the maximum throughput is lower (1.5 MSPS). The ADC powers down between conversions. 16 AVDD P Input Analog Power. Nominally at 2.5 V. 17,18 AGND P Analog Power Ground. Rev. D | Page 7 of 28 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUIT GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION CONVERSION MODES OF OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM ANALOG INPUTS DRIVER AMPLIFIER CHOICE VOLTAGE REFERENCE INPUT Internal Reference, REF = 4.096V (PDREF = Low) External 1.2 V Reference and Internal Buffer (PDREF = High) External Reference (PDREF = High, REFIN = Low) Reference Decoupling POWER SUPPLY DIGITAL INTERFACE DATA READING OPTIONS Reading During Conversion, Fast Hosts (Turbo or Normal Mode) Split-Reading, Any Speed Host (Turbo or Normal Mode) Reading During Acquisition, Any Speed Hosts (Turbo or Normal Mode) /CS MODE, 3-WIRE WITHOUT BUSY INDICATOR /CS MODE, 3-WIRE WITH BUSY INDICATOR /CS MODE, 4-WIRE WITHOUT BUSY INDICATOR /CS MODE, 4-WIRE WITH BUSY INDICATOR CHAIN MODE WITHOUT BUSY INDICATOR CHAIN MODE WITH BUSY INDICATOR APPLICATION HINTS LAYOUT EVALUATING THE PERFORMANCE OF THE AD7986 OUTLINE DIMENSIONS ORDERING GUIDE
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