AD7612* PRODUCT PAGE QUICK LINKS Last Content Update: 02/23/2017COMPARABLE PARTSDESIGN RESOURCES View a parametric search of comparable parts. • AD7612 Material Declaration • PCN-PDN Information EVALUATION KITS • Quality And Reliability • AD7612 Evaluation Board • Symbols and Footprints DOCUMENTATIONDISCUSSIONSApplication Notes View all AD7612 EngineerZone Discussions. • AN-1141: Powering a Dual Supply Precision ADC with Switching Regulators SAMPLE AND BUY • AN-931: Understanding PulSAR ADC Support Circuitry Visit the product page to see pricing options. • AN-932: Power Supply Sequencing Data SheetTECHNICAL SUPPORT • AD7612: 16-Bit, 750 kSPS, Unipolar/Bipolar Programmable Submit a technical question or find your regional support Input PulSAR® ADC Data Sheet number. REFERENCE MATERIALSDOCUMENT FEEDBACKTechnical Articles Submit feedback for this data sheet. • MS-2210: Designing Power Supplies for High Speed ADC This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified. Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION OVERVIEW CONVERTER OPERATION MODES OF OPERATION Normal Mode Impulse Mode TRANSFER FUNCTIONS TYPICAL CONNECTION DIAGRAM ANALOG INPUTS Input Range Selection Input Structure VOLTAGE REFERENCE INPUT/OUTPUT Internal Reference (REF = 5 V) (PDREF = Low, PDBUF = Low) External 2.5 V Reference and Internal Buffer (REF = 5 V) (PDREF = High, PDBUF = Low) External 5 V Reference (PDREF = High, PDBUF = High) Reference Decoupling Temperature Sensor POWER SUPPLIES Core Supplies High Voltage Supplies Digital Output Supply Power Sequencing Power Dissipation vs. Throughput Power Down CONVERSION CONTROL INTERFACES DIGITAL INTERFACE RESET PARALLEL INTERFACE Master Parallel Interface Slave Parallel Interface 8-Bit Interface (Master or Slave) SERIAL INTERFACE Data Interface MASTER SERIAL INTERFACE Internal Clock (SER/ = high, EXT/ = Low) Read During Convert (RDC = High) Read During Convert (RDC = Low, DIVSCLK[1:0] = [0 to 3]) SLAVE SERIAL INTERFACE External Clock (SER/ = High, EXT/ = High) External Discontinuous Clock Data Read After Conversion Daisy-Chain Feature External Clock Data Read During Previous Conversion External Clock Data Read After/During Conversion HARDWARE CONFIGURATION SOFTWARE CONFIGURATION MICROPROCESSOR INTERFACING SPI Interface APPLICATION INFORMATION LAYOUT GUIDELINES EVALUATING PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE
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