Datasheet AD7794, AD7795 (Analog Devices) - 9

AD7794/AD7795 TIMING DIAGRAMS CS (I) t t 6 1 t5 DOUT/RDY (O) MSB LSB t t7 2 t3 SCLK (I)
3
t4
-00 54
I = INPUT, O = OUTPUT
48 0 Figure 3. Read Cycle Timing Diagram
CS (I) t8 t11 SCLK (I) t9 t10 DIN (I) MSB LSB
04 -0 54
I = INPUT, O = OUTPUT
48 0 Figure 4. Write Cycle Timing Diagram Rev. D | Page 9 of 36 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING CHARACTERISTICS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS RMS NOISE AND RESOLUTION SPECIFICATIONS CHOP ENABLED External Reference Internal Reference CHOP DISABLED TYPICAL PERFORMANCE CHARACTERISTICS ON-CHIP REGISTERS COMMUNICATIONS REGISTER RS2, RS1, RS0 = 0, 0, 0 STATUS REGISTER RS2, RS1, RS0 = 0, 0, 0; Power-On/Reset = 0x80 (AD7795)/0x88 (AD7794) MODE REGISTER RS2, RS1, RS0 = 0, 0, 1; Power-On/Reset = 0x000A CONFIGURATION REGISTER RS2, RS1, RS0 = 0, 1, 0; Power-On/Reset = 0x0710 DATA REGISTER RS2, RS1, RS0 = 0, 1, 1; Power-On/Reset = 0x0000(AD7795), 0x000000 (AD7794) ID REGISTER RS2, RS1, RS0 = 1, 0, 0; Power-On/Reset = 0xXF IO REGISTER RS2, RS1, RS0 = 1, 0, 1; Power-On/Reset = 0x00 OFFSET REGISTER RS2, RS1, RS0 = 1, 1, 0; Power-On/Reset = 0x8000 (AD7795), 0x800000 (AD7794)) FULL-SCALE REGISTER RS2, RS1, RS0 = 1, 1, 1; Power-On/Reset = 0x5XXX (AD7795), 0x5XXX00 (AD7794) ADC CIRCUIT INFORMATION OVERVIEW DIGITAL INTERFACE Single Conversion Mode Continuous Conversion Mode Continuous Read CIRCUIT DESCRIPTION ANALOG INPUT CHANNEL INSTRUMENTATION AMPLIFIER BIPOLAR/UNIPOLAR CONFIGURATION DATA OUTPUT CODING BURNOUT CURRENTS EXCITATION CURRENTS BIAS VOLTAGE GENERATOR REFERENCE REFERENCE DETECT RESET AVDD MONITOR CALIBRATION GROUNDING AND LAYOUT APPLICATIONS INFORMATION FLOWMETER OUTLINE DIMENSIONS ORDERING GUIDE