Datasheet AD9233 (Analog Devices) - 3

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AD9233 TABLE OF CONTENTS
Features .. 1 Timing ... 22 Applications... 1 Serial Port Interface (SPI).. 23 General Description ... 1 Configuration Using the SPI... 23 Functional Block Diagram .. 1 Hardware Interface... 23 Product Highlights ... 1 Configuration Without the SPI .. 23 Revision History ... 3 Memory Map .. 24 Specifications... 4 Reading the Memory Map Table.. 24 DC Specifications ... 4 Layout Considerations... 27 AC Specifications.. 5 Power and Ground Recommendations ... 27 Digital Specifications ... 6 CML ... 27 Switching Specifications .. 7 RBIAS... 27 Timing Diagram ... 7 Reference Decoupling.. 27 Absolute Maximum Ratings.. 8 Evaluation Board .. 28 Thermal Resistance .. 8 Power Supplies .. 28 ESD Caution.. 8 Input Signals.. 28 Pin Configuration and Function Descriptions... 9 Output Signals .. 28 Equivalent Circuits ... 10 Default Operation and Jumper Selection Settings... 29 Typical Performance Characteristics ... 11 Alternative Clock Configurations.. 29 Theory of Operation .. 15 Alternative Analog Input Drive Configuration.. 30 Analog Input Considerations.. 15 Schematics ... 31 Voltage Reference ... 17 Evaluation Board Layouts ... 36 Clock Input Considerations .. 18 Bill of Materials (BOM)... 39 Jitter Considerations .. 19 Outline Dimensions ... 42 Power Dissipation and Standby Mode... 20 Ordering Guide .. 42 Digital Outputs ... 21 Rev. A | Page 2 of 44 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS EQUIVALENT CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG INPUT CONSIDERATIONS Input Common Mode Differential Input Configurations Single-Ended Input Configuration VOLTAGE REFERENCE Internal Reference Connection External Reference Operation CLOCK INPUT CONSIDERATIONS Clock Input Options Clock Duty Cycle JITTER CONSIDERATIONS POWER DISSIPATION AND STANDBY MODE Power-Down Mode Standby Mode DIGITAL OUTPUTS Out-of-Range (OR) Condition Digital Output Enable Function (OEB) TIMING Data Clock Output (DCO) SERIAL PORT INTERFACE (SPI) CONFIGURATION USING THE SPI HARDWARE INTERFACE CONFIGURATION WITHOUT THE SPI MEMORY MAP READING THE MEMORY MAP TABLE Open Locations Default Values Logic Levels SPI-Accessible Features LAYOUT CONSIDERATIONS POWER AND GROUND RECOMMENDATIONS Exposed Paddle Thermal Heat Slug Recommendations CML RBIAS REFERENCE DECOUPLING EVALUATION BOARD POWER SUPPLIES INPUT SIGNALS OUTPUT SIGNALS DEFAULT OPERATION AND JUMPER SELECTION SETTINGS POWER VIN VREF RBIAS CLOCK PDWN CSB SCLK/DFS SDIO/DCS ALTERNATIVE CLOCK CONFIGURATIONS ALTERNATIVE ANALOG INPUT DRIVE CONFIGURATION SCHEMATICS EVALUATION BOARD LAYOUTS BILL OF MATERIALS (BOM) OUTLINE DIMENSIONS ORDERING GUIDE