Datasheet AD7265 (Analog Devices) - 4

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Data Sheet AD7265 SPECIFICATIONS
TA = TMIN to TMAX, VDD = 2.7 V to 5.25 V, fSCLK = 16 MHz, fS = 1 MSPS, VDRIVE = 2.7 V to 5.25 V; specifications apply using internal reference or external reference = 2.5 V ± 1%, unless otherwise noted.1
Table 1. Parameter Specification Unit Test Conditions/Comments
DYNAMIC PERFORMANCE Signal-to-Noise Ratio (SNR)2 71 dB min fIN = 50 kHz sine wave; differential mode 69 dB min fIN = 50 kHz sine wave; single-ended and pseudo differential modes Signal-to-Noise + Distortion Ratio (SINAD)2 70 dB min fIN = 50 kHz sine wave; differential mode 68 dB min fIN = 50 kHz sine wave; single-ended and pseudo differential modes Total Harmonic Distortion (THD)2 –77 dB max fIN = 50 kHz sine wave; differential mode –73 dB max fIN = 50 kHz sine wave; single-ended and pseudo differential modes Spurious-Free Dynamic Range (SFDR)2 –75 dB max fIN = 50 kHz sine wave Intermodulation Distortion (IMD)2 fa = 30 kHz, fb = 50 kHz Second-Order Terms –88 dB typ Third-Order Terms –88 dB typ Channel-to-Channel Isolation –88 dB typ SAMPLE AND HOLD Aperture Delay3 11 ns max Aperture Jitter3 50 ps typ Aperture Delay Matching3 200 ps max Full Power Bandwidth 33/26 MHz typ @ 3 dB, VDD = 5 V/VDD = 3 V 3.5/3 MHz typ @ 0.1 dB, VDD = 5 V/VDD = 3 V DC ACCURACY Resolution 12 Bits Integral Nonlinearity2 ±1 LSB max ±0.5 LSB typ; differential mode ±1.5 LSB max ±0.5 LSB typ; single-ended and pseudo differential modes Differential Nonlinearity2,4 ±0.99 LSB max Differential mode −0.99/+1.5 LSB max Single-ended and pseudo differential modes Straight Binary Output Coding Offset Error ±6 LSB max Offset Error Match ±2 LSB typ Gain Error ±2.5 LSB max Gain Error Match ±0.5 LSB typ Twos Complement Output Coding Positive Gain Error ±2 LSB max Positive Gain Error Match ±0.5 LSB typ Zero Code Error ±5 LSB max Zero Code Error Match ±1 LSB typ Negative Gain Error ±2 LSB max Negative Gain Error Match ±0.5 LSB typ ANALOG INPUT5 Single-Ended Input Range 0 V to VREF V RANGE pin low 0 V to 2 × VREF RANGE pin high Pseudo Differential Input Range: V 6 IN+ − VIN− 0 to VREF V RANGE pin low 2 × VREF V RANGE pin high Fully Differential Input Range: VIN+ and VIN− VCM ± VREF/2 V VCM = common-mode voltage 7 = VREF/2 VIN+ and VIN− VCM ± VREF V VCM = VREF Rev. B | Page 3 of 28 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION ANALOG INPUT STRUCTURE ANALOG INPUTS Single-Ended Mode Differential Mode Driving Differential Inputs Using an Op Amp Pair Pseudo Differential Mode ANALOG INPUT SELECTION OUTPUT CODING TRANSFER FUNCTIONS DIGITAL INPUTS VDRIVE MODES OF OPERATION NORMAL MODE PARTIAL POWER-DOWN MODE FULL POWER-DOWN MODE POWER-UP TIMES POWER vs. THROUGHPUT RATE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7265 TO ADSP-218x AD7265 to ADSP-BF53x AD7265 TO TMS320C541 AD7265 TO DSP563xx APPLICATION HINTS GROUNDING AND LAYOUT PCB DESIGN GUIDELINES FOR LFCSP EVALUATING THE AD7265 PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE