Datasheet AD9480 (Analog Devices) - 7

link to page 7
AD9480 SWITCHING SPECIFICATIONS
AVDD = 3.3 V, DRVDD = 3.3 V, differential clock input, DCS enabled, unless otherwise noted.
Table 4. AD9480-250 Parameter Temp Test Level Min Typ Max Unit
CLOCK Maximum Conversion Rate Full VI 250 MSPS Minimum Conversion Rate Full VI 20 MSPS Clock Pulse Width High (tEH) Full IV 1.2 2 ns Clock Pulse Width Low (tEL) Full IV 1.2 2 ns OUTPUT PARAMETERS Valid Time (tV)1 Full VI 1.9 ns Propagation Delay (tPD) Full VI 2.8 3.8 ns Rise Time (tR) 20% to 80% Full V 0.5 ns Fall Time (tF) 20% to 80% Full V 0.5 ns DCO Propagation Delay (tCPD) Full VI 1.9 2.7 3.7 ns Data-to-DCO Skew (tPD − tCPD) Full IV 0 0.1 0.6 ns Pipeline Latency 25°C VI 8 Cycles APERTURE Aperture Delay (tA) 25°C V 1.5 ns Aperture Uncertainty (Jitter) 25°C V 0.25 ps rms 1 Valid time is approximately equal to minimum tPD. CLOAD equals 5 pF maximum.
TIMING DIAGRAM N–1 tA N+10 N+11 N N+9 AIN N+1 N+8 8 CYCLES tEH tEL 1/fS CLK+ CLK– tPD tV DATA N–8 N–7 N N+1 N+2 OUT tCPD DCO+ DCO–
04619-002 Figure 2. Timing Diagram Rev. A | Page 6 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY DC SPECIFICATIONS DIGITAL SPECIFICATIONS AC SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS APPLICATION NOTES CLOCKING THE AD9480 ANALOG INPUTS VOLTAGE REFERENCE Fixed Reference External Reference Programmable Reference DIGITAL OUTPUTS OUTPUT CODING INTERLEAVING TWO AD9480s DATA CLOCK OUT POWER-DOWN AD9480 EVALUATION BOARD POWER CONNECTOR ANALOG INPUTS GAIN OPTIONAL OPERATIONAL AMPLIFIER CLOCK OPTIONAL CLOCK BUFFER OPTIONAL XTAL VOLTAGE REFERENCE DATA OUTPUTS EVALUATION BOARD BILL OF MATERIALS (BOM) PCB SCHEMATICS PCB LAYERS OUTLINE DIMENSIONS ORDERING GUIDE