Datasheet AD7679 (Analog Devices) - 8

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AD7679 ABSOLUTE MAXIMUM RATINGS Table 5.AD7679 Absolute Maximum Ratings1 Parameter Rating 1.6mA IOL
Analog Inputs IN+2, IN–2, REF, REFBUFIN, REFGND to AVDD + 0.3 V to AGND
TO OUTPUT
AGND – 0.3 V
1.4V PIN CL
Ground Voltage Differences
60pF1
AGND, DGND, OGND ±0.3 V
500
μ
A IOH
Supply Voltages AVDD, DVDD, OVDD –0.3 V to +7 V
1 IN SERIAL INTERFACE MODES,THE SYNC, SCLK, AND SDOUT TIMINGS ARE DEFINED WITH A MAXIMUM LOAD
AVDD to DVDD, AVDD to OVDD ±7 V
CL OF 10pF; OTHERWISE,THE LOAD IS 60pF MAXIMUM.
DVDD to OVDD –0.3 V to +7 V 03085–0–002 Digital Inputs –0.3 V to DVDD + 0.3 V Figure 2. Load Circuit for Digital Interface Timing SDOUT, SYNC, SCLK Outputs, C Internal Power Dissipation3 700 mW L = 10 pF Internal Power Dissipation4 2.5 W
2V
Junction Temperature 150°C
0.8V
Storage Temperature Range –65°C to +150°C
tDELAY tDELAY
Lead Temperature Range
2V 2V
(Soldering 10 sec)
0.8V 0.8V
300°C 03085–0–003 1 Figure 3. Voltage Reference Levels for Timing Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied.
ESD CAUTION
Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 See Analog Inputs section. 3 Specification is for device in free air: 48-Lead LQFP: θJA = 91°C/W, θJC = 30°C/W. 3 Specification is for device in free air: 48-Lead LFCSP: θJA = 26°C/W. Rev. A | Page 7 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS DEFINITION OF SPECIFICATIONS TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM Analog Inputs Driver Amplifier Choice Single-to-Differential Driver Voltage Reference Power Supply POWER DISSIPATION VERSUS THROUGHPUT CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read after Conversion External Clock Data Read during Conversion MICROPROCESSOR INTERFACING SPI Interface (ADSP-219x) APPLICATION HINTS LAYOUT EVALUATING THE AD7679’S PERFORMANCE OUTLINE DIMENSIONS ORDERING GUIDE