Datasheet AD7676 (Analog Devices) - 10

AD7676 100 16.0 50 OVDD = 2.7V @ 85 C 95 15.5 40 OVDD = 2.7V @ 25 C SNR 90 15.0 D) – dB 30 S/(N D) Y – ns 85 14.5 OVDD = 5.0V @ 85 C DELA ENOB – Bits 20 ENOB t 12 80 14.0 OVDD = 5.0V @ 25 C SNR AND S/(N 10 75 13.5 70 13.0 0 1 10 100 1000 0 50 100 150 200 FREQUENCY – kHz CL – pF
TPC 7. SNR, S/(N+D), and ENOB vs. Frequency TPC 10. Typical Delay vs. Load Capacitance CL
96 100k SNR 10k S/(N D) A 93 1k 100 AVDD FULL SCALE) – dB DVDD O T 90 10 ING CURRENTS – T 1 OVDD 87 0.1 OPERA 0.01 SNR (REFERENCED 83 0.001 –60 –50 –40 –30 –20 –10 0 10 100 1k 10k 100k 1M INPUT LEVEL – dB SAMPLING RATE – SPS
TPC 8. SNR and S/(N+D) vs. Input Level TPC 11. Operating Currents vs. Sample Rate
96 –104 250 SNR DVDD 200 93 –106 150 ING CURRENTS – nA T 90 –108 SNR – dB THD – dB 100 WN OPERA 87 –110 THD 50 AVDD WER-DO OVDD PO 84 –112 0 –55 –35 –15 0 25 45 65 85 105 125 –55 –35 –15 5 25 45 65 85 105 TEMPERATURE – C TEMPERATURE – C
TPC 9. SNR, THD vs. Temperature TPC 12. Power-Down Operating Currents vs. Temperature REV. B –9– Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS RESOLUTION ANALOG INPUT THROUGHPUT SPEED DC ACCURACY AC ACCURACY SAMPLING DYNAMICS REFERENCE DIGITAL INPUTS DIGITAL OUTPUTS POWER SUPPLIES TEMPERATURE RANGE TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ORDERING GUIDE PIN FUNCTION DESCRIPTIONS PIN FUNCTION DESCRIPTIONS (continued) PIN CONFIGURATION DEFINITION OF SPECIFICATIONS Integral Nonlinearity Error (INL) Differential Nonlinearity Error (DNL) +Full-Scale Error –Full-Scale Error Bipolar Zero Error Spurious-Free Dynamic Range (SFDR) Effective Number of Bits (ENOB) Total Harmonic Distortion (THD) Signal-to-Noise Ratio (SNR) Signal-to-(Noise + Distortion) Ratio (S/[N+D]) Aperture Delay Transient Response Typical Performance Characteristics CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM Analog Inputs Single-to-Differential Driver Driver Amplifier Choice Voltage Reference Input Power Supply POWER DISSIPATION CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read after Conversion External Clock Data Read During Conversion MICROPROCESSOR INTERFACING SPI Interface (MC68HC11) ADSP-21065L in Master Serial Interface APPLICATION HINTS Layout Evaluating the AD7676 Performance OUTLINE DIMENSIONS Revision History