Datasheet AD7663 (Analog Devices) - 10

Typical Performance Characteristics–AD7663 3.0 8000 2.5 6802 6745 7000 2.0 1.5 6000 1.0 5000 0.5 0 4000 INL – LSB –0.5 COUNTS 3000 –1.0 –1.5 1800 2000 –2.0 1000 1000 –2.5 0 0 33 4 0 0 –3.0 0 0 16384 32768 49152 65536 7FFD 7FFE 7FFF 8000 8001 8002 8003 8004 8004 8005 CODE CODE IN HEXA
TPC 1. Integral Nonlinearity vs. Code TPC 4. Histogram of 16,384 Conversions of a DC Input at the Code Transition
50 9000 8032 45 8000 40 7000 35 6000 30 5000 25 3944 3902 4000 COUNTS 20 NUMBER OF UNITS 3000 15 2000 10 5 1000 233 271 0 0 2 0 0 0 0 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.1 2.7 7FFC 7FFD 7FFE 7FFF 8000 8001 8002 8003 8004 8005 8006 POSITIVE INL – LSB CODE IN HEXA
TPC 2. Typical Positive INL Distribution (446 Units) TPC 5. Histogram of 16,384 Conversions of a DC Input at the Code Center
80 –0 4096 POINT FFT 70 –20 FS = 250kHz fIN = 45kHz, –0.5dB –40 SNR = 90.1dB 60 SINAD = 89.8dB THD = –100.5dB –60 SFDR = 102.7dB 50 –80 40 –100 30 NUMBER OF UNITS –120 20 –140 AMPLITUDE – dB OF FULL SCALE 10 –160 0 –180 –3 –2.7 –2.4 –2.1 –1.8 –1.5 –1.2 –0.9 –0.6 –0.3 0 25 50 75 100 125 NEGATIVE INL – LSB FREQUENCY – kHz
TPC 3. Typical Negative INL Distribution (446 Units) TPC 6. FFT Plot REV. B –9– Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION PulSAR Selection FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDERING GUIDE PIN FUNCTION DESCRIPTION DEFINITION OF SPECIFICATIONS Integral Nonlinearity Error (INL) Differential Nonlinearity Error (DNL) Full-Scale Error Bipolar Zero Error Unipolar Zero Error Spurious-Free Dynamic Range (SFDR) Effective Number of Bits (ENOB) Total Harmonic Distortion (THD) Signal-to-Noise Ratio (SNR) Signal-to-(Noise + Distortion) Ratio (S/[N+D]) Aperture Delay Transient Response Typical Performance Characteristics CIRCUIT INFORMATION CONVERTER OPERATION Transfer Functions TYPICAL CONNECTION DIAGRAM Analog Inputs Driver Amplifier Choice Voltage Reference Input Scaler Reference Input (Bipolar Input Ranges) Power Supply POWER DISSIPATION CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read after Conversion External Clock Data Read during Conversion MICROPROCESSOR INTERFACING SPI Interface (MC68HC11) ADSP-21065L in Master Serial Interface APPLICATION HINTS Layout Evaluating the AD7663 Performance OUTLINE DIMENSIONS Revision History